OREGON STATE UNIVERSITY

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Biblio

Found 6 results
Filters: Author is Sasidhar, Naga  [Clear All Filters]
2012
Sasidhar, N., D. Gubbins, P K. Hanumolu, and U. Moon, "Rail-to-Rail Input Pipelined ADC Incorporating Multistage Signal Mapping", IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 59, issue 9, pp. 558 - 562, 09/2012.
2007
Sasidhar, N., Y-J. Kook, S. Takeuchi, K. Hamashita, K. Takasuka, P K. Hanumolu, and U. Moon, "A 1.8V 36-mW 11-bit 80MS/s pipelined ADC using capacitor and opamp sharing", 2007 IEEE Asian Solid-State Circuits Conference, Jeju City, South Korea, IEEE, pp. 240 - 243, 11/2007.