OREGON STATE UNIVERSITY

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Biblio

Found 103 results
Filters: Author is Fiez, Terri S.  [Clear All Filters]
2003
Owens, B. E., P. Birrer, S. Adluri, R. Shreeve, S K. Arunachalam, H. M. Habal, S. Hsu, A. Sharma, K. Mayaram, and T. S. Fiez, "Strategies for simulation, measurement and suppression of digital noise in mixed-signal circuits", CICC Custom Integrated Circuits Conference 2003, San Jose, CA, IEEE, pp. 361 - 364, 09/2003.
Eshraghi, A., and T. S. Fiez, "A time-interleaved parallel ΔΣ A/D converter", IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, vol. 50, issue 3, pp. 118 - 129, 03/2003.
Traylor, R., D. Heer, and T. S. Fiez, "Using an integrated platform for learning to reinvent engineering education", IEEE Transactions on Education, vol. 46, issue 4, pp. 409 - 419, 11/2003.
2002
Jiang, R., and T. S. Fiez, "A 1.8V 14b ΔΣ A/D converter with 4MSamples/s conversion", 2002 IEEE International Solid-State Circuits Conference, vol. 2, San Francisco, CA, IEEE, pp. 174 - 458, 02/2002.
Barton, N., D. Ozis, T. S. Fiez, and K. Mayaram, "Analysis of jitter in ring oscillators due to deterministic noise", 2002 IEEE International Symposium on Circuits and Systems, vol. 4, Phoenix-Scottsdale, AZ, IEEE, pp. IV-393 - IV-396, 05/2002.
Batten, R. D., A. Eshraghi, and T. S. Fiez, "Calibration of parallel ΔΣ ADCs", IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, vol. 49, issue 6, pp. 390 - 399, 06/2002.
Chilakapati, U., T. S. Fiez, and A. Eshraghi, "A CMOS transconductor with 80-dB SFDR up to 10 MHz", IEEE Journal of Solid-State Circuits, vol. 37, issue 3, pp. 365 - 370, 03/2002.
Ozis, D., T. S. Fiez, and K. Mayaram, "A comprehensive geometry-dependent macromodel for substrate noise coupling in heavily doped CMOS processes", IEEE 2002 Custom Integrated Circuits Conference, Orlando, FL, IEEE, pp. 497 - 500, 05/2002.
Li, Z., and T. S. Fiez, "Dynamic element matching in low oversampling delta sigma ADCs", 2002 IEEE International Symposium on Circuits and Systems, vol. 4, Phoenix-Scottsdale, AZ, IEEE, pp. IV-683 - IV-686, 05/2002.
Barton, N., D. Ozis, T. S. Fiez, and K. Mayaram, "The effect of supply and substrate noise on jitter in ring oscillators", IEEE 2002 Custom Integrated Circuits Conference, Orlando, FL, IEEE, pp. 505 - 508, 05/2002.
Ozis, D., K. Mayaram, and T. S. Fiez, "An efficient modeling approach for substrate noise coupling analysis", 2002 IEEE International Symposium on Circuits and Systems, vol. 5, Phoenix-Scottsdale, AZ, IEEE, pp. V-237 - V-240, 05/2002.
Batten, R. D., and T. S. Fiez, "An efficient parallel delta-sigma ADC utilizing a shared multi-bit quantizer", 2002 IEEE International Symposium on Circuits and Systems, vol. 3, Phoenix-Scottsdale, AZ, IEEE, pp. III-715 - III-718, 05/2002.
Ou, Y., N. Barton, R. Fetche, N. Seshan, T. S. Fiez, U. Moon, and K. Mayaram, "Phase noise simulation and estimation methods: a comparative study", IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, vol. 49, issue 9, pp. 635 - 638, 09/2002.
Heer, D., R. Traylor, and T. S. Fiez, "Tekbots: creating excitement for engineering through community, innovation and troubleshooting", Conference on Frontiers in Education, vol. 2, Boston, MA, IEEE, pp. F1A-7 - F1A-12, 11/2002.
2001
Chilakapati, U., T. S. Fiez, and A. Eshraghi, "A 3.3 V transconductor in 0.35 μm CMOS with 80 dB SFDR up to 10 MHz", IEEE 2001 Custom Integrated Circuits Conference, San Diego, CA, IEEE, pp. 459 - 462, 05/2001.
Kwon, W-H., B-R. Ryum, and T. S. Fiez, "Design and implementation of driver IC for miniature VC-TCXO module", Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, Ann Arbor, MI, IEEE, pp. 226 - 230, 09/2001.
2000
Naiknaware, R., and T. S. Fiez, "142 dB ΔΣ ADC with a 100 nV LSB in a 3 V CMOS process", IEEE 2000 Custom Integrated Circuits Conference, Orlando, FL, IEEE, pp. 5 - 8, 05/2000.
Radke, R. E., A. Eshraghi, and T. S. Fiez, "A 14-bit current-mode ΔΣ DAC based upon rotated data weighted averaging", IEEE Journal of Solid-State Circuits, vol. 35, issue 8, pp. 1074 - 1084, 08/2000.
Fetche, R., C. Fetche, T. S. Fiez, and K. Mayaram, "Analysis of the effects of supply noise coupling on phase noise in integrated LC CMOS oscillators", IEEE Radio and Wireless Conference (RAWCON), Denver, CO, IEEE, pp. 199 - 202, 09/2000.
Samavedam, A., A. Sadate, K. Mayaram, and T. S. Fiez, "A scalable substrate noise coupling model for design of mixed-signal IC's", IEEE Journal of Solid-State Circuits, vol. 35, issue 6, pp. 895 - 904, 06/2000.
Naiknaware, R., H. Tang, and T. S. Fiez, "Time-referenced single-path multi-bit ΔΣ ADC using a VCO-based quantizer", IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, vol. 47, issue 7, pp. 596 - 602, 07/2000.
1999
Naiknaware, R., and T. S. Fiez, "Automated hierarchical CMOS analog circuit stack generation with intramodule connectivity and matching considerations", IEEE Journal of Solid-State Circuits, vol. 34, issue 3, pp. 304 - 317, 03/1999.
Samavedam, A., K. Mayaram, and T. S. Fiez, "Design-oriented substrate noise coupling macromodels for heavily doped CMOS processes", IEEE International Symposium on Circuits and Systems, vol. 6, Orlando, FL, IEEE, pp. 218 - 221, 05/1999.
Chilakapari, U., and T. S. Fiez, "Effect of switch resistance on the SC integrator settling time", IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, vol. 46, issue 6, pp. 810 - 816, 06/1999.
Samavedam, A., K. Mayaram, and T. S. Fiez, "A scalable substrate noise coupling model for mixed-signal ICs", IEEE/ACM International Conference on Computer-Aided Design, San Jose, CA, IEEE, pp. 128 - 131, 11/1999.

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