OREGON STATE UNIVERSITY

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Biblio

Found 7 results
Filters: Author is He, Jinjin  [Clear All Filters]
2012
He, J., H. Liu, Z. Wang, X. Huang, and K. Zhang, "High-Speed Low-Power Viterbi Decoder Design for TCM Decoders", IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 20, issue 4, pp. 755 - 759, 04/2012.
2011
He, J., H. Liu, Z. Wang, X. Huang, and K. Zhang, "High-Speed Low-Power Viterbi Decoder Design for TCM Decoders", IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. PP, issue 99, pp. 1 - 5, 03/2011.
Weber, C., J. He, L C. Zhong, and H. Liu, "Multiband Architecture for high-speed SerDes", DesignCon 2011, Santa Clara, CA, 01/2011.
Best paper award
2010
He, J., Z. Wang, and H. Liu, "An Efficient 4-D 8PSK TCM Decoder Architecture", IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 18, issue 5, pp. 808 - 817, 05/2010.
He, J., Z. Wang, and H. Liu, "Memory-reduced MAP decoding for double-binary convolutional Turbo code", 2010 IEEE International Symposium on Circuits and Systems - ISCAS 2010, Paris, France, IEEE, pp. 469 - 472, 06/2010.
2009
He, J., H. Liu, and Z. Wang, "A fast ACSU architecture for Viterbi decoder using T-algorithm", 2009 Conference Record of the Forty-Third Asilomar Conference on Signals, Systems and Computers, Pacific Grove, CA, IEEE, pp. 231 - 235, 11/2009.
2008
He, J., Z. Wang, and H. Liu, "Low-complexity high-speed 4-D TCM decoder", 2008 IEEE Workshop on Signal Processing Systems (SiPS), Washington, DC, IEEE, pp. 216 - 220, 10/2008.