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Found 52 results

2011
Crop, J., E. Krimer, N. Moezzi-Madani, R. Pawlowski, T. Ruggeri, P. Y. Chiang, and M. Erez, "Error Detection and Recovery Techniques for Variation-Aware CMOS Computing: A Comprehensive Review", Journal of Low Power Electronics and Applications, vol. 1, issue 3, pp. 334 - 356, 10/2011. Abstract
Hu, C., and P. Y. Chiang, "All-digital 3-50 GHz ultra-wideband pulse generator for short-range wireless interconnect in 40nm CMOS", 2011 IEEE Custom Integrated Circuits Conference - CICC 2011, San Jose, CA, IEEE, pp. 1 - 4, 09/2011. Abstract
Postman, J., and P. Y. Chiang, "Energy-efficient transceiver circuits for short-range on-chip interconnects", 2011 IEEE Custom Integrated Circuits Conference - CICC 2011, San Jose, CA, IEEE, pp. 1 - 4, 09/2011. Abstract
Hu, K., T. Jiang, S. Palermo, and P. Y. Chiang, "Low-power 8Gb/s near-threshold serial link receivers using super-harmonic injection locking in 65nm CMOS", 2011 IEEE Custom Integrated Circuits Conference - CICC 2011, San Jose, CA, IEEE, pp. 1 - 4, 09/2011. Abstract
House, S., S. Connell, I. Miligan, D. Austin, T. L. Hayes, and P. Y. Chiang, "Indoor Localization Using Pedestrian Dead Reckoning Updated with RFID-Based Fiducials", IEEE Engineering in Medicine and Biology Conference, Boston, MA, pp. 7598 - 7601, 08/2011. Abstract
Albright, R. K., B. J. Goska, T. M. Hagen, M. Y. Chi, G. Cauwenberghs, and P. Y. Chiang, "OLAM: A Wearable, Non-Contact Sensor for Continuous Heart-Rate and Activity Monitoring", IEEE Engineering in Medicine and Biology Conference, Boston, MA, pp. 5625 - 5628 , 08/2011. Abstract
Ragab, A., Y. Liu, K. Hu, P. Y. Chiang, and S. Palermo, "Receiver Jitter Tracking Characteristics in High-Speed Source Synchronous Links", Journal of Electrical and Computer Engineering, vol. 2011, pp. 1 - 15, 08/2011. Abstract
Xia, L., J. Wang, W. Beattie, J. Postman, and P. Y. Chiang, "Sub-2-ps, Static Phase Error Calibration Technique Incorporating Measurement Uncertainty Cancellation for Multi-Gigahertz Time-Interleaved T/H Circuits", IEEE Transactions on Circuits and Systems I: Regular Papers, vol. PP, issue 99, 08/2011. Abstract
Goska, B. J., J. Postman, M. Erez, and P. Y. Chiang, "Hardware/Software Co-Design for EnergyEfficient Parallel Computing", Department of Energy SciDAC Conference, Denver, CO, 07/2011. Abstract
Bai, R., J. Wang, L. Xia, F. Zhang, Z. Yang, W. Hu, and P. Y. Chiang, "Sinusoidal Clock Sampling for Multigigahertz ADCs", IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 58, issue 12, pp. 2808 - 2815, 07/2011. Abstract
Hu, C., and P. Y. Chiang, "Transmitter equalization for multipath interference cancellation in impulse radio ultra-wideband (IR-UWB) transceivers", Ultra Wideband Communications: Novel Trends / Book 3: InTech, pp. 137-160, 07/2011.
Xia, L., C. Hu, and P. Y. Chiang, "Ultra-Wideband RF Transceiver Design in CMOS Technology", Ultra Wideband Communications: Novel Trends / Book 3: InTech, pp. 91-112, 07/2011.
Moezzi-Madani, N., T. Thorolfsson, P. Y. Chiang, and W. R. Davis, "Area-Efficient Antenna-Scalable MIMO Detector for K-best Sphere Decoding", Journal of Signal Processing Systems, vol. 65, 06/2011. Abstract
Hu, C., R. Khanna, J. Nejedlo, K. Hu, H. Liu, and P. Y. Chiang, "A 90 nm-CMOS, 500 Mbps, 3–5 GHz Fully-Integrated IR-UWB Transceiver With Multipath Equalization Using Pulse Injection-Locking for Receiver Phase Synchronization", IEEE Journal of Solid-State Circuits, vol. 46, issue 5, pp. 1076 - 1088, 05/2011. Abstract
Hu, K., L. Wu, and P. Y. Chiang, "A Comparative Study of 20-Gb/s NRZ and Duobinary Signaling Using Statistical Analysis", IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. PP, issue pp, pp. 1-5, 05/2011. Abstract
Xia, L., K. Shao, H. Chen, Y. Huang, Z. Hong, and P. Y. Chiang, "0.15-nJ/b 3–5-GHz IR-UWB System With Spectrum Tunable Transmitter and Merged-Correlator Noncoherent Receiver", IEEE Transactions on Microwave Theory and Techniques, vol. 59, issue 4, pp. 1147 - 1156, 04/2011. Abstract
Woracheewan, S., C. Hu, R. Khanna, J. Nejedlo, H. Liu, and P. Y. Chiang, "Measurement and characterization of ultra-wideband wireless interconnects within active computing systems", 2011 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), Hsinchu, Taiwan, IEEE, pp. 1 - 4, 04/2011. Abstract
Moezzi-Madani, N., T. Thorolfsson, J. Crop, P. Y. Chiang, and W. R. Davis, "An energy-efficient 64-QAM MIMO detector for emerging wireless standards", Design, Automation Test in Europe Conference Exhibition (DATE), 2011, Grenoble, France, pp. 1 -6, 03/2011. Abstract
Redfield, S., S. Woracheewan, H. Liu, P. Y. Chiang, J. Nejedlo, and R. Khanna, "Understanding the Ultrawideband Channel Characteristics Within a Computer Chassis", IEEE Antennas and Wireless Propagation Letters, vol. 10, pp. 191 - 194, 02/2011. Abstract
Lamers, T., P. Y. Chiang, R. Ruby, and B. Pruitt, "Electrically Addressable, Liquid Release Well Array for a Hand-Held, Scent-Dispense System", Micro & Nano Letters, vol. 6, issue 1, pp. 37, 01/2011. Abstract
Xia, L., S. Redfield, and P. Y. Chiang, "Experimental Characterization of a UWB Channel for Body Area Networks", EURASIP Journal on Wireless Communications and Networking, vol. 2011, pp. 1 - 11, 01/2011. Abstract
2010
Krishna, T., J. Postman, C. Edmonds, L. - S. Peh, and P. Y. Chiang, "SWIFT: A SWing-Reduced Interconnect for a Token-Based Network-on-Chip in 90nm CMOS", 2010 IEEE International Conference on Computer Design (ICCD 2010), Amsterdam, Netherlands, IEEE, pp. 439 - 446, 10/2010. Abstract
Jiang, T., W. Liu, F. Y. Zhong, C. Zhong, and P. Y. Chiang, "Single-Channel, 1.25-GS/s, 6-Bit, Loop-Unrolled Asynchronous SAR-ADC in 40nm-CMOS", 2010 IEEE Custom Integrated Circuits Conference (CICC), San Jose, CA, IEEE, pp. 1 - 4, 09/2010. Abstract
Chiang, P. Y., and C. Hu, "Chaotic Pulse-Position Baseband Modulation for an Ultra-Wideband Transceiver in CMOS", IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 57, issue 8, pp. 642 - 646, 08/2010. Abstract
Chiang, P. Y., S. Woracheewan, C. Hu, L. Guo, R. Khanna, J. Nejedlo, and H. Liu, "Short-Range, Wireless Interconnect within a Computing Chassis: Design Challenges", IEEE Design & Test of Computers, vol. 27, issue 4, pp. 32 - 43, 07/2010. Abstract

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