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Found 8 results
Filters: Keyword is CMOS  [Clear All Filters]
Qi, N., Y. Xu, B. Chi, Y. Xu, X. Yu, X. Zhang, N. Xu, P. Y. Chiang, W. Rhee, and Z. Wang, "A Dual-Channel Compass/GPS/GLONASS/Galileo Reconfigurable GNSS Receiver in 65 nm CMOS With On-Chip I/Q Calibration", IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 59, issue 8, pp. 1720 - 1732, 08/2012.
Rajaee, O., and U. Moon, "A 12-ENOB 6X-OSR noise-shaped pipelined ADC utilizing a 9-bit linear front-end", 2011 Symposium on VLSI Circuits (VLSIC), pp. 34 -35, 06/2011.
Nishida, Y., K. Hamashita, and G. C. Temes, "An Enhanced Dual-Path ΔΣ A/D Converter", IEICE Trans. on Electronics, vol. E93-C, issue 6, pp. 884-892, 06/2010.
Chi, B., J. Yao, P. Y. Chiang, and Z. Wang, "A Fast-Settling Wideband-IF ASK Baseband Circuit for a Wireless Endoscope Capsule", IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 56, issue 4, pp. 275 - 279, 04/2009.
Bohn, F., H. Wang, A. Natarajan, S. Jeon, and A. Hajimiri, "Fully integrated frequency and phase generation for a 6–18GHz tunable multi-band phased-array receiver in CMOS", IEEE Radio Frequency Integrated Circuits Symposium (RFIC), Atlanta, GA, IEEE, pp. 439 - 442, 04/2008.
Jeon, S., Y-J. Wang, H. Wang, F. Bohn, A. Natarajan, A. Babakhani, and A. Hajimiri, "A Scalable 6-to-18 GHz Concurrent Dual-Band Quad-Beam Phased-Array Receiver in CMOS", IEEE Journal of Solid-State Circuits, vol. 43, issue 12, pp. 2660 - 2673, 12/2008.
Natarajan, A., A. Komijani, and A. Hajimiri, "A fully integrated 24-GHz phased-array transmitter in CMOS", IEEE Journal of Solid-State Circuits, vol. 40, issue 12, pp. 2502 - 2514, 12/2005.
Hajimiri, A., H. Hashemi, A. Natarajan, X. Guan, and A. Komijani, "Integrated Phased Array Systems in Silicon", Proceedings of the IEEE, vol. 93, issue 9, pp. 1637 - 1655, 09/2005.