OREGON STATE UNIVERSITY

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Biblio

Found 4 results
Filters: Keyword is delta-sigma modulator  [Clear All Filters]
2012
Zanbaghi, R., S. Saxena, G. C. Temes, and T. S. Fiez, "A 75-dB SNDR, 5-MHz Bandwidth Stage-Shared 2-2 MASH ΔΣ Modulator Dissipating 16 mW Power", IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 59, issue 8, pp. 1614 - 1625, 08/2012.
2011
Rajaee, O., and U. Moon, "A 12-ENOB 6X-OSR noise-shaped pipelined ADC utilizing a 9-bit linear front-end", 2011 Symposium on VLSI Circuits (VLSIC), pp. 34 -35, 06/2011.
Wang, Y., P K. Hanumolu, and G. C. Temes, "Design Techniques for Wideband Discrete-Time Delta-Sigma ADCs With Extra Loop Delay", IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 58, issue 7, pp. 1518 - 1530, 07/2011.
2010
Zanbaghi, R., T. S. Fiez, and G. C. Temes, "A new zero-optimization scheme for noise-coupled ΔΣ ADCs", Proceedings of 2010 IEEE International Symposium on Circuits and Systems, Paris, France, IEEE, pp. 2163 - 2166, 06/2010.