OREGON STATE UNIVERSITY

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Biblio

Found 6 results
Filters: Author is Naiknaware, Ravindranath  [Clear All Filters]
2004
Naiknaware, R., and T. S. Fiez, "Process-Insensitive Low-Power Design of Switched-Capacitor Integrators", IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 51, issue 10, pp. 1940 - 1952, 10/2004.
2000
Naiknaware, R., and T. S. Fiez, "142 dB ΔΣ ADC with a 100 nV LSB in a 3 V CMOS process", IEEE 2000 Custom Integrated Circuits Conference, Orlando, FL, IEEE, pp. 5 - 8, 05/2000.
Naiknaware, R., H. Tang, and T. S. Fiez, "Time-referenced single-path multi-bit ΔΣ ADC using a VCO-based quantizer", IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, vol. 47, issue 7, pp. 596 - 602, 07/2000.
1999
Naiknaware, R., and T. S. Fiez, "Automated hierarchical CMOS analog circuit stack generation with intramodule connectivity and matching considerations", IEEE Journal of Solid-State Circuits, vol. 34, issue 3, pp. 304 - 317, 03/1999.
Naiknaware, R., and T. S. Fiez, "Switched-capacitor integrator design optimizing for power and process variations", IEEE International Symposium on Circuits and Systems, vol. 2, Orlando, FL, IEEE, pp. 278 - 281, 05/1999.
Naiknaware, R., and T. S. Fiez, "Time-referenced single-path multi-bit ΔΣ ADC using a VCO based quantizer", IEEE International Symposium on Circuits and Systems, vol. 2, Orlando, FL, IEEE, pp. 33 - 36, 05/1999.