Once every week while school is in session, EECS invites a distinguished researcher or practitioner in a computer science or electrical and computer engineering-related field to present their ideas and/or work. Talks are generally targeted to electrical engineering and computer science graduate students. This colloquium series is free and open to everyone.

Upcoming Colloquia

Artificial Intelligence & High Performance Computing Convergence, Challenges, and Opportunities

Monday, April 22, 2019 - 4:00pm to 4:50pm
LINC 200

Speaker Information

Vikram Saletore
Principal Engineer
Artificial Intelligence Products Group
Intel Corp.
Hillsboro, Oregon

Abstract

Driven by an exponential increase in the volume and diversity of data during the past 15 years, we have observed Data Analytics (DA) and High Performance Computing (HPC) workloads sharing the same infrastructure. We are witnessing another convergence taking place of Artificial Intelligence (AI) and HPC due to the rapid development and use of Deep Learning/Machine Learning frameworks and algorithms with scientific HPC applications. This convergence has begun to reshape the landscape of scientific computing and is enabling scientists address large problems in ways that were not possible before. I will also present how the software stacks are supported efficiently over a versatile general purpose computing architecture minimizing data movement saving time, energy, and costs. I will also present some of the challenges and opportunities with use cases on multiple collaborations with customers in Compute Service Provider (SURFsara), High Energy Physics (CERN), Healthcare (Novartis, Max Planck), and national research labs.

Speaker Bio

Vikram Saletore, a Principal Engineer with Artificial Intelligence Products Group, Intel Corp, leads a team for Deep Learning solutions and performance with customers. He collaborates with Enterprise/Government, HPC, & OEMs customers on Deep Learning Training and Inference. Vikram is also an Intel Parallel Computing Center Co-PI for deep learning research and collaboration with; SURFsara, CERN, Max Planck, & GENCI. Vikram has 25+ years of experience and delivered optimized software to Oracle & Informix parallel databases and worked on performance modeling for Intel CPU platforms and Data Center Optane™ memory technical readiness. As a Research Scientist with Intel Labs he led collaboration with HP Labs, Palo Alto on networking acceleration. Prior to Intel, as a faculty in Computer Science at OSU, Corvallis, OR, Vikram led NSF funded research in parallel and distributed computing supervising 8 students (1 PhD, 7 MS). He also developed CPU and Networking products at DEC and AMD. Vikram received his MS from Berkeley & PhD in EE in Parallel Computing from Univ. of Illinois at Urbana-Champaign. He has published 50+ peer-reviewed publications and 40+ white papers, and blogs and has multiple patents issued.

Robust Computing Systems: From Today to the N3XT 1,000X

Michael and Judith Gaulke Distinguished Lecture Series
Monday, May 6, 2019 - 4:00pm to 4:50pm
LINC 200

Speaker Information

Subhasish Mitra
Professor of Electrical Engineering and of Computer Science
Stanford University

Abstract

Future computing systems require research breakthroughs in the following areas:

  • Robustness: Existing validation and test methods barely cope with today’s complexity. Reliability failures, largely benign in the past, are becoming visible at the system level. Security is a major concern at both hardware and software levels.
  • Performance: Energy benefits of silicon have plateaued (power wall). Coming generations of abundant-data applications (e.g., machine learning) are dominated by off-chip memory accesses (memory wall).
  • New applications: Neuro- and bio-sciences create tremendous opportunities for new computing systems, from implants to understanding brain functions.

This talk presents an overview of my group’s research in the above areas, and particularly emphasizes complexity and performance:

  • QED and Symbolic QED dramatically improve pre-silicon verification and post-silicon validation. Difficult bugs can now be detected and localized automatically, in a few minutes to a few hours. In contrast, existing approaches might take weeks (or months) of intense manual work with limited success. Industrial case studies show 8x-60x improved verification productivity using QED techniques.
  • N3XT leverages emerging nanotechnologies to create new architectures that overcome the memory wall and the power wall. N3XT targets 1,000x energy efficiency improvements for future computing systems. N3XT hardware prototypes represent leading examples of transforming scientifically-interesting nanomaterials and nanodevices into actual nanosystems.

Speaker Bio

Subhasish Mitra is Professor of Electrical Engineering and of Computer Science at Stanford University. He directs the Stanford Robust Systems Group, co-leads the Computation focus area of the Stanford SystemX Alliance, and is a faculty member of the Stanford Wu Tsai Neurosciences Institute. Prof. Mitra also holds the Carnot Chair of Excellence in Nanosystems at CEA-LETI in Grenoble, France. His research ranges across robust computing, nanosystems, electronic design automation, and neurosciences. Results from his research group have been widely deployed by industry and have inspired significant development efforts by government and research organizations in multiple countries.

Jointly with his students and collaborators, Prof. Mitra demonstrated the first carbon nanotube computer and the first three-dimensional nanosystem with computation immersed in data storage. These demonstrations received wide-spread recognition: cover of NATURE, Research Highlight to the United States Congress by the National
Science Foundation, and highlight as "important, scientific breakthrough" by news organizations around the world.

In the field of robust computing, Prof. Mitra and his students created key approaches for soft error resilience, circuit failure prediction, on-line self-test and diagnostics, and QED (Quick Error Detection) design verification and system validation. His earlier work on X-Compact test compression at Intel Corporation has proven essential to cost-effective manufacturing and high-quality testing of almost all electronic systems across the industry. X-Compact and its derivatives have been implemented in widely-used commercial Electronic Design Automation tools.

Prof. Mitra's honors include the ACM SIGDA / IEEE CEDA Newton Technical Impact Award in Electronic Design Automation (a test of time honor), the Semiconductor Research Corporation's Technical Excellence Award (for innovation that significantly enhances the semiconductor industry), the Intel Achievement Award (Intel’s highest corporate honor), and the United States Presidential Early Career Award for Scientists and Engineers from the White House. He and his students have published award-winning papers at major venues: ACM/IEEE Design Automation Conference, IEEE International Solid-State Circuits Conference, ACM/IEEE International Conference on Computer-Aided Design, IEEE International Test Conference, IEEE Transactions on CAD, IEEE VLSI Test Symposium, and the Symposium on VLSI Technology. At Stanford, he has been honored several times by graduating seniors "for being important to them during their time at Stanford."

Prof. Mitra has served on the Defense Advanced Research Projects Agency's (DARPA) Information Science and Technology Board as an invited member. He is a Fellow of the Association for Computing Machinery (ACM) and a Fellow of the Institute of Electrical and Electronics Engineers (IEEE).

Integrated circuit design to enable highly miniaturized wireless sensing systems

Monday, May 13, 2019 - 4:00pm to 4:50pm
LINC 200

Speaker Information

Kannan A Sankaragomathi
Senior hardware engineer
Google Inc

Abstract

Several emerging applications such as healthcare sensing, ambient computing and Internet of Things demand highly miniaturized wireless sensors that are order-of-magnitude smaller than the current state of the art sensors. These next generation wireless sensors also need to be cheap, standards compliant and long lasting to enable widespread commercial adoption. Energy sources (i.e batteries) and frequency references (typically quartz crystal) are proving to be a critical bottleneck in achieving many of these goals. Intense circuit design research in the past decade has pushed the envelope in finding alternatives for batteries and the quartz crystal. In this talk I will discuss a few of the systems I have been fortunate to work on.

a) A thin-Film Bulk Acoustic Resonator (FBAR) based quartz replacement.

b) A 27uW optically powered ‘barely subcutaneous’ biosensing platform.

c) A 0.004 mm3, 63 nW integrated circuit for an injectable glucose sensing system with optical power transfer

d) A 1.5mm3 standards compliant, PLL-free BLE broadcaster module

Speaker Bio

Kannan A Sankaragomathi, received his B.E. degree from the College of Engineering, Guindy, M.E. degree from the Indian Institute of Science, Bangalore. He, received his Ph.D. degree in Electrical Engineering from the University of Washington, Seattle in 2015. After graduation he joined Google-X and is currently a senior hardware engineer at Google Inc. He has also held positions at Verily Life Sciences and Texas Instruments in the past. Kannan Sankaragomathi is a recipient of the 2008 Technoinventor award from the Indian Semiconductor Association, and the Joel M Kenney fellowship at the University of Washington. Since 2017, he serves on the technical program committee of ISLPED. His current research interests are in the area of low power IC design for sensing and computing applications.

Sense and sense-making research in the Ambient Computing domain

Monday, May 20, 2019 - 4:00pm to 4:50pm
LINC 200

Speaker Information

Giuseppe Raffa
Principal Engineer
Intel Labs

Abstract

We are entering a new era of computing – Ambient Computing – where sensing, inference and actuation technologies will disappear into our daily lives and the spaces we live in. Spaces will be able to sense multiple signals, understand their meaning and infer high-level contextual information about people, spaces and situations.

This vision requires novel algorithms and systems, and also new user-centric approaches to make sure these technologies can provide real value to the inhabitants of these spaces. This talk will introduce the research activities that are happening in Intel Labs related to Ambient Computing and Smart Spaces technologies.

I will present our research approach and various horizontal technologies we are researching on related to machine learning and artificial intelligence. Some examples include multimodal person identification, activity recognition, emotion recognition and mixed reality. Finally, I will discuss some of the vertical domains the team is exploring, i.e. Smart Home (Kid’s learning support and Elderly care), Autonomous vehicles (in cabin experiences) and Smart Manufacturing (task support).

Speaker Bio

Giuseppe "Beppe" Raffa is a Principal Engineer and Research Manager whose research interests are in the field of smart spaces, sensors-based context-aware systems and sensors-based human-computer interaction. He leads a team working on “Smart Spaces and Interactions” in environments such as Home, Office, Industrial. He worked on gesture recognition, low power systems, on-body multimodal interfaces, and context-aware applications, systems and architectures. Beppe received his Ph.D. degree in Computer Engineering from the University of Bologna with a dissertation on "Context-aware Computing in Smart Environments".

He has co-authored >20 papers published in international conferences and journals, served as co-editor of two workshops (UbiComp2005, ACII 2017), filed >100 patents and served as committee member of several ACM and IEEE conferences. Beppe received his PhD in Computer Science from the University of Bologna (Italy), where he researched, developed, and deployed in-field location- and context-aware mobile systems across Europe in the Cultural Heritage research domain. He can be contacted at giuseppe.raffa@intel.com and https://www.linkedin.com/in/giuseppe-beppe-raffa/

Heuristic Search: Something Old and Something New

Monday, June 3, 2019 - 4:00pm to 4:50pm
LINC 200

Speaker Information

Robert Holte
Professor Emeritus
Computing Science Department
University of Alberta

Abstract

I begin this talk with a review of long-established results in heuristic search and the early history of bidirectional heuristic search. I then describe a recent (2016) breakthrough in bidirectional heuristic search (the MM algorithm), which challenges long-held assumptions and exposes exciting new research directions. Although the technical details in this talk are focused on heuristic search, the general lessons with which I conclude are relevant to researchers in all branches of A.I. and possibly Computer Science more generally.

Speaker Bio

Professor Emeritus Robert Holte of the Computing Science Department at the University of Alberta is a former editor-in-chief of the journal "Machine Learning" and co-founder and former director of the Alberta Innovates Center for Machine Learning (AICML, now known as Amii). In addition to machine learning, Professor Holte has made seminal contributions to the subfield of A.I. known as single-agent heuristic search, most notably his recent work on bidirectional heuristic search. Professor Holte was elected a Fellow of the Association for the Advancement of Artificial Intelligence (AAAI) in 2011 and received a Lifetime Achievement Award for his work on heuristic search from the Symposium on Combinatorial Search in 2018. Another Lifetime Achievement Award will be announced at the end of May.

Past Colloquia

Renato Mancuso
Friday, March 1, 2019 - 10:00am to 11:00am
Xinyu Wang
Tuesday, February 26, 2019 - 10:00am to 11:00am
Jason Parham
Monday, February 25, 2019 - 4:00pm to 4:50pm
Monroe D. Kennedy III
Wednesday, February 20, 2019 - 10:00am to 11:00am
Ryan St. Pierre
Tuesday, February 19, 2019 - 10:00am to 11:00am
Corina Barbalata
Monday, February 18, 2019 - 10:00am to 11:00am
Kaushik Jayaram
Friday, February 8, 2019 - 10:00am to 11:00am

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