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October 6, 2008
--------------------------------------------------- The Tapia Conference Scholarship Program facilitates attendance of those individuals otherwise unable to attend. Scholarships cover travel, hotel accommodations, meals, and conference registration. Scholarship award preference will be given to students and mentors (from academia, industry, or government) who plan to present posters, papers, panels, workshops, or are entered in the Robotics Competition at the conference. In addition, preference will be given to teams comprised of faculty and students. Scholarship awards are competitive and all individuals are expected to submit a good application. Details Ignite Corvallis
Fall 2008 Center for Teaching and Learning Workshops: all teaching faculty, staff, and graduate assistants welcome! Registration is required. Refreshments will be provided at all workshops. All workshops will be held in Milam 215 unless stated otherwise.
Engineers without Borders October Fund Raising Banquet --------------------------------------------------- --------------------------------------------------- Friday, October 10, 12-2pm, KEC 1114. MS FINAL ORAL EXAM - Arunkumar Puppala. Major Professor: Xiaoli Fern; Committee: Prasad Tadepalli, Weng-Keen Wong. "Dashboard Application for Experimentation Reporting Platform." Details --------------------------------------------------- Don't forget to check out the AfterCollege job site, tailored especially for our EECS students. This week's featured employers:
Software Engineer – New Grad, QUALCOMM. As a QUALCOMM software engineer, you will develop, implement and maintain software for the most complex wireless devices. With a degree in computer science or engineering, you may analyze and identify system-level integration issues, plan and integrate new features, define integration and test platforms, develop and execute test scenarios for various multimedia applications such as audio, video, speech, imaging and graphics applications. Details Hardware Engineer – New Grad, QUALCOMM. As a hardware engineer at QUALCOMM, you will work with programmable logic, digital signal processors, microprocessors, and ASICs on high-density circuit cards and gain hands-on knowledge during design validation and system integration. We are also looking for exceptional hardware designers who will design and develop full custom and semi-custom complex digital and analog ICs for wireless network and communication systems. Details IC Design Engineer – RF / Mixed Signal / Power – New Grad, QUALCOMM. The RF/Analog division has multiple openings in the areas of: RFIC Design, Mixed Signal Design, and Power Management (PMIC). As an engineer, you will develop all RF, mixed-signal, and analog ICs for complete wireless platforms in order to drive our next phase of growth in cellular, wireless peripherals and 4G technologies. Details Hardware Engineer – Intern, QUALCOMM. As a hardware intern at QUALCOMM, you will work with programmable logic, digital signal processors, microprocessors, and ASICs on high-density circuit cards and gain hands-on knowledge during design validation and system integration. We are also looking for exceptional hardware designers who will design and develop full custom and semi-custom complex digital and analog ICs for wireless network and communication systems. Details IC Design Engineer – RF / Mixed Signal / Power – Intern, QUALCOMM. The RF/Analog division has multiple openings in the areas of: RFIC Design, Mixed Signal Design, and Power Management (PMIC). As an intern, you will work closely with an experienced designer on challenging RF, analog and/or mixed-signal circuit design, power management, or modeling issues. Details Software Engineer – Intern, QUALCOMM. As a QUALCOMM software engineering intern, you will work with a team of software engineers to develop, implement and maintain software for the most complex wireless devices. With a degree in computer science or engineering, you may analyze and identify system-level integration issues, plan and integrate new features, define integration and test platforms, develop and execute test scenarios for various multimedia applications such as audio, video, speech, imaging and graphics applications. Details ViewPlus Technologies, Part Time Student Research Engineer. Participate in development of ViewPlus embossers/printers, including at least one of the following tasks: Development and testing of electronic boards; Development and testing of firmware; Development and testing of mechanical portions including CAD. Details Wed Oct 15: Intel Info Session/Recruiting Event. 5pm, Rogers 230. For engineering students in MIME, EE, ChE, and CEM. Food and beverages provided. Sponsored by the OSU chapter of IIE. Women Studies and Computer Science instructor, Pam Van Londen is seeking energetic students interested in building a long-term, self-supported organization which produces archives online video interviews of innovative women. Up to six students per term can work in the following areas: Program planning; Grant writing; Researching, interviewing, writing, and translating; Videography and post-production; Travel around the world. Details BSG Student Test Engineer. The Business Solutions Group (BSG) is part of Oregon State University's College of Business. The BSG is a complete resource for quality assurance of network technologies, provides students with an on-campus internship experience, and functions as a test platform for the deployment of new technology for the College of Business. Duties: Test pre-production Networking Hardware and Software; Building complex testing environments; Setup Hardware and install software; Keep up with emerging technologies; Continue to learn about networking technologies and share knowledge; Potentially develop test plans. Details Component Design Engineer/Validation Engineer, Intel. In this position, you will be working as a member of the Ultra Mobility Group's Hudson Silicon Engineering team and be responsible for pre-silicon validation of processor cores and IA SoCs, and IP components. Your responsibilities will include but not be limited to: Working closely with system architects, chip design engineers, emulation and post silicon validation engineers to validate designs in various stages in the product life cycle; Verifying the interoperability with partner components in unit, fullchip and system level simulation environments; Defining the object oriented validation environment architecture emphasizing principles of reusable design, validation test planning, and validation test development and debugging. Details
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School of Electrical Engineering and Computer Science, 1148 Kelley Engineering Center |