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Mining IC Test Data to Optimize VLSI Testing

TitleMining IC Test Data to Optimize VLSI Testing
Publication TypeConference Paper
Year of Publication2000
AuthorsFountain, T., T. G. Dietterich, and B. Sudyka
Conference NameIn Proceedings of the 6th ACM SIGKDD International Conference on Knowledge Discovery and Data Mining
Date Published08/2000
PublisherACM Press
Conference LocationBoston, MA

We describe an application of data mining and decision analysis to the problem of die-level functional test in integrated circuit manufacturing. Integrated circuits are fabricated on large wafers that can hold hundreds of individual chips (“die”). In current practice, large and expensive machines test each of these die to check that they are functioning properly (die-level functional test; DLFT), and then the wafers are cut up, and the good die are assembled into packages and connected to the package pins. Finally, the resulting packages are tested to ensure that the final product is functioning correctly. The purpose of die-level functional test is to avoid the expense of packaging bad die and to provide rapid feedback to the fabrication process by detecting die failures. The challenge for a decision-theoretic approach is to reduce the amount of DLFT (and the associated costs) while still providing process feedback. We describe a decision-theoretic approach to DLFT in which historical test data is mined to create a probabilistic model of patterns of die failure. This model is combined with greedy value-of-information computations to decide in real time which die to test next and when to stop testing. We report the results of several experiments that demonstrate the ability of this procedure to make good testing decisions, good stopping decisions, and to detect anomalous die. Based on experiments with historical test data from Hewlett Packard Company, the resulting system has the potential to


Winner of Award for Best Application Paper (Research Track)