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Analysis of Residue Integration Sampling With Improved Jitter Immunity

TitleAnalysis of Residue Integration Sampling With Improved Jitter Immunity
Publication TypeJournal Article
Year of Publication2011
AuthorsOh, T., N. Maghari, D. Gubbins, and U. Moon
JournalIEEE Transactions on Circuits and Systems II: Express Briefs
Volume58
Issue7
Pagination417 - 421
Date Published07/2011
ISSN1558-3791
Keywordsanalog–digital conversion (ADC), charge sampling, impulse sampler, integration sampler, jitter, sampling methods
Abstract

The improved jitter immunity of window residue sampling (WRS) is analyzed in this brief. We build a mathematical model for WRS and compare the signal-to-noise ratio performance with the conventional impulse and integration sampling methods. Simulation results show that WRS has better jitter immunity of approximately 3 dB compared with conventional impulse sampling at the Nyquist input frequency.

DOI10.1109/TCSII.2011.2158273
Short TitleIEEE Trans. Circuits Syst. II