A new single-loop delta-sigma modulator with extended dynamic range is proposed. It employs an auxiliary multi-bit quantizer which processes the quantization error of the main quantizer. This addition guarantees improved stability over a wider input signal range. The cancelation of the quantization noise of the main quantizer is done via in-loop digital summation and is immune to opamp DC gain. As a proof of concept, a 3rd order modulator is designed in a 0.18μm CMOS process. This implementation incorporates a 3-level main quantizer, a 9-level auxiliary quantizer and 30dB open-loop opamp gain. Measurement results show that at 1.2V power supply and reference, the input signal can go over +5dBFS without any stability issues, achieving 75dB SNDR and 77.2dB dynamic range at OSR of 16. The clock frequency is 40MHz and the power dissipation is 4.9mW.