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Design Techniques for Wideband Discrete-Time Delta-Sigma ADCs With Extra Loop Delay

TitleDesign Techniques for Wideband Discrete-Time Delta-Sigma ADCs With Extra Loop Delay
Publication TypeJournal Article
Year of Publication2011
AuthorsWang, Y., P K. Hanumolu, and G. C. Temes
JournalIEEE Transactions on Circuits and Systems I: Regular Papers
Volume58
Issue7
Pagination1518 - 1530
Date Published07/2011
ISSN1558-0806
Keywordsdelta-sigma modulator, direct-charge-transfer adder, extra loop delay
Abstract

Novel implementation techniques, such as the use of direct-charge-transfer stage, noise coupling, and dynamic element matching can improve the performance of wideband ΔΣ ADCs. However, they introduce extra loop delay, which compromises the low-distortion property and even the loop stability. This paper shows how the addition of independent feedback and feed-forward branches to the loop filter can compensate the extra loop delay, and restore the desired signal and noise transfer functions. The design methodology is then generalized for different kinds of ΔΣ ADCs, and the low-distortion property is analyzed. Two wideband delta-sigma ADCs have been designed and simulated to verify the theory.

DOI10.1109/TCSI.2011.2143110
Short TitleIEEE Trans. Circuits Syst. I