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A third-order delta-sigma modulator using noise-shaped bi-directional single-slop quantizer

TitleA third-order delta-sigma modulator using noise-shaped bi-directional single-slop quantizer
Publication TypeJournal Article
Year of Publication2011
AuthorsMaghari, N., and U. Moon
JournalIEEE Journal of Solid-State Circuits
Volume46
Issue12
Pagination2882 - 2891
Date Published12/2011
ISSN0018-9200
Keywordsanalog-to-digital conversion, CMOS analog integrated circuits, delta-sigma modulation, switched-capacitor circuits, time-based quantization
Abstract

This paper describes a new analog-to-digital converter based on the traditional dual-slope ADC operation. With a small modification to the discharging phase of the dual-slope ADC, first-order quantization noise shaping is achieved. This quantizer is used in a second-order loop filter and results in an overall third-order quantization noise shaping. To remove the need for any extra active element, this quantizer is merged with the active adder. In this fashion, the multi-bit flash ADC is removed and hence the loading of the active-adder is reduced to a single continuous-time comparator. Furthermore, to alleviate the speed of the counting-clock and the common-mode biasing accuracy requirements, a bi-directional discharging scheme is proposed. As a proof of concept, the second-order loop filter with the proposed quantizer is fabricated in a 0.18 μm CMOS technology and achieves over 78 dB SNDR with an oversampling ratio of 24 and 50 MHz sampling speed. The power consumption is 2.9 mW from a 1.5 V power supply.

DOI10.1109/JSSC.2011.2164964
Short TitleIEEE J. Solid-State Circuits