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Domino-Logic-Based ADC for Digital Synthesis

TitleDomino-Logic-Based ADC for Digital Synthesis
Publication TypeJournal Article
Year of Publication2011
AuthorsWeaver, S. T., B. P. Hershberg, N. Maghari, and U. Moon
JournalIEEE Transactions on Circuits and Systems II: Express Briefs
Pagination744 - 747
Date Published11/2011
Keywordsanalog–digital conversion, low power, scaling, synthesis

A low-power synthesizable analog-to-digital converter (ADC) is presented. By cascading many digital-like domino-logic cells whose propagation delay is influenced by an analog input voltage, a digital value is obtained at the end of the allowed ripple period by determining the number of cells that the ripple passed through. The sample-and-hold is simply a bootstrapped switch into a small sampling capacitor. As each domino-logic cell passes the ripple, charge is kicked back onto the input capacitor, which creates a significant second harmonic. Distortion caused by even harmonics is canceled by implementing a pseudodifferential structure. A test chip is fabricated in 0.18-μm CMOS. The test chip achieves over 5.4-bit effective number of bits up to 50 MS/s with a 1.3-V supply. With a sampling frequency of 50 MS/s and a 24-MHz input, a 34.2-dB signal-to-noise-plus distortion ratio is achieved while consuming 433 μW and occupying only 0.094 mm².

Short TitleIEEE Trans. Circuits Syst. II