Metal fill patterning in modern IC processes forces many floating metal structures to exist in the fabricated design. The number of these structures makes electrostatic capacitance extraction difficult and the capacitance impact may be neglected or incorrectly approximated. In this paper closed-form, semi-empirical formulas are presented for a single layer of floating metal fill between two parallel plates. The new formulas have been applied to calculating the ground capacitance of a MIM capacitor. The maximum error was less than 1% for a wide range of metal fill dimensions in a 0.18 m process.