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Reduced order modeling of coupled on-chip interconnects for silicon-based RF integrated circuits

TitleReduced order modeling of coupled on-chip interconnects for silicon-based RF integrated circuits
Publication TypeConference Paper
Year of Publication2000
AuthorsZheng, J., V. K. Tripathi, and A. Weisshaar
Conference Name2000 IEEE MTT-S International Microwave Symposium Digest
Pagination973 - 976
Date Published06/2000
PublisherIEEE
Conference LocationBoston, MA
Abstract

A reduced order modeling methodology of coupled on-chip interconnects for silicon-based RF integrated circuits is presented. The modeling approach is based on a mixed PEEC formulation combined with a hierarchical model order I reduction technique and captures both the conductor skin and proximity effects and the substrate skin effect. The response of the CAD-oriented macromodel is in good agreement with EM simulation results.

DOI10.1109/MWSYM.2000.863519