OREGON STATE UNIVERSITY

You are here

A 90 nm-CMOS, 500 Mbps, 3–5 GHz Fully-Integrated IR-UWB Transceiver With Multipath Equalization Using Pulse Injection-Locking for Receiver Phase Synchronization

TitleA 90 nm-CMOS, 500 Mbps, 3–5 GHz Fully-Integrated IR-UWB Transceiver With Multipath Equalization Using Pulse Injection-Locking for Receiver Phase Synchronization
Publication TypeJournal Article
Year of Publication2011
AuthorsHu, C., R. Khanna, J. Nejedlo, K. Hu, H. Liu, and P. Y. Chiang
JournalIEEE Journal of Solid-State Circuits
Volume46
Issue5
Pagination1076 - 1088
Date Published05/2011
ISSN1558-173X
Keywordsequalization, impulse radio (IR), injection-locking, phase shifter, sense amplifier, synchronization, transceiver, UWB
Abstract

A fully-integrated, 3-5 GHz Impulse-Radio UWB transceiver with on-chip flash ADC is designed in 90 nm-CMOS. A new scheme for receiver phase acquisition is proposed that uses pulse injection-locking to synchronize the receive clock with the transmitted data, eliminating the need for clock/data recovery (CDR), requiring only static receiver phase alignment with the transmitted pulses at startup. Transmitter pre-emphasis equalization is utilized to mitigate the effect of multipath on bit-error rate (BER). Occupying 2 mm&sup2; die area, the transceiver achieves a data rate of 500 Mbps, energy efficiency of 0.18 nj/b at 500 Mbps, and a RX raw BER of <; 10&#8315;&sup3; across a distance of 10 cm at 125 Mbps. In a real multipath environment, BER improves by 2.35× after equalization of the first multipath reflection.

DOI10.1109/JSSC.2011.2118130
Short TitleIEEE J. Solid-State Circuits