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A Dual-Channel Compass/GPS/GLONASS/Galileo Reconfigurable GNSS Receiver in 65 nm CMOS With On-Chip I/Q Calibration

TitleA Dual-Channel Compass/GPS/GLONASS/Galileo Reconfigurable GNSS Receiver in 65 nm CMOS With On-Chip I/Q Calibration
Publication TypeJournal Article
Year of Publication2012
AuthorsQi, N., Y. Xu, B. Chi, Y. Xu, X. Yu, X. Zhang, N. Xu, P. Y. Chiang, W. Rhee, and Z. Wang
JournalIEEE Transactions on Circuits and Systems I: Regular Papers
Volume59
Issue8
Pagination1720 - 1732
Date Published08/2012
ISSN1558-0806
KeywordsCMOS, compass, dual-channel, Galileo, GLONASS, GNSS, GPS, I/Q calibration, receiver, reconfigurable
Abstract

A fully integrated dual-channel reconfigurable GNSS receiver supporting Compass/GPS/GLONASS/Galileo systems is implemented in 65 nm CMOS. The receiver incorporates two independent channels to receive dual-frequency signals simultaneously. GNSS signals located at the 1.2 GHz or 1.6 GHz bands are supported, with their bandwidths programmable among 2.2 MHz, 4.2 MHz, 8 MHz, 10 MHz, and 18 MHz. By implementing a flexible frequency plan with a low/zero-IF architecture and reconfigurable analog baseband circuits, only one frequency synthesizer is required to provide the local oscillator (LO) frequency for two channels, thereby avoiding any LO crosstalk. Analog baseband circuits employ operational amplifiers that are capable of power scaling, in order to minimize power consumption across different operating modes. An I/Q mismatch calibration module placed prior to the complex-IF bandpass filter is implemented to improve the image rejection ratio. The receiver achieves a minimum 1.88 dB noise figure, an average 50 dB image rejection ratio, and a 64 dB dynamic range with 1 dB steps of gain-adjustment, with a total power consumption of 31-44 mW. Finally, experimental verification combining both the receiver and a digital baseband shows a positioning result comparable to commercial chips.

DOI10.1109/TCSI.2012.2206502
Short TitleIEEE Trans. Circuits Syst. I
Refereed DesignationRefereed