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A systematic investigation of the degradation mechanisms in SOI n-channel LD-MOSFETs

TitleA systematic investigation of the degradation mechanisms in SOI n-channel LD-MOSFETs
Publication TypeJournal Article
Year of Publication2003
AuthorsVandooren, A., S. Cristoloveanu, J. F. Conley, M. Mojarradi, and E. Kolawa
JournalSolid-State Electronics
Volume47
Issue9
Pagination1419 - 1427
Date Published09/2003
ISSN00381101
Abstract

The operation and degradation mechanisms in silicon on insulator LD-MOSFETs are governed by the series resistance which is back-gate bias dependent. The influence of the back-gate bias during degradation and subsequent testing is investigated and modeled. The damage formation and overall loss in LD-MOSFETs performance induced by irradiation, hot-carrier injection, or low temperature are complex and remarkably different from the more usual case of low-voltage CMOS transistors. The series resistance can change by a factor of 4 according to the back-gate bias and radiation dose. The degradation processes are clearly identified and the main parameters (oxide charges, traps at the front and back interfaces, series resistances) are extracted using a simple model of the LD-MOSFET, which accounts for the modification of the drift region resistance.

DOI10.1016/S0038-1101(03)00101-1
Short TitleSolid-State Electronics