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Analysis of back-end flash in a 1.5b/stage pipelined ADC

TitleAnalysis of back-end flash in a 1.5b/stage pipelined ADC
Publication TypeConference Paper
Year of Publication2013
AuthorsGande, M., J. Guerber, and U. Moon
Conference NameIEEE International Symposium on Circuits and Systems (ISCAS2013)
Pagination2247 - 2250
Date Published05/2013
PublisherIEEE
Conference LocationBeijing, China
ISBN Number978-1-4673-5761-6
Abstract

An analysis of the impact of last stage flash in a conventional pipeline ADC is performed in this paper. The performance of a pipeline ADC can be altered significantly by calibrating the comparators in the back-end flash. Also, realizing that the input to the back-end flash (in a pipeline ADC) is not uniformly distributed, this paper proposes alternative back-end flash references to improve the overall performance of the ADC. An analysis of the performance of the pipeline with large offsets in the MDAC stages is also presented in this paper.

DOI10.1109/ISCAS.2013.6572324