Monday, October 17, 2016 - 4:00pm to 4:50pm
DEAR 118

Speaker Information

Frank O'Mahony
Principal Engineer
Intel

Abstract

Over the past decade, wireline data rates have doubled about every four years to keep pace with aggregate system bandwidth requirements. Electrical signaling standards for networking, telecom and storage applications – including Ethernet and OIF-CEI – tend to be the first to define the path to increase line rates. Today, links up to 28Gb/s/lane are being widely deployed. Meanwhile, standards for 50-56Gb/s are being defined, and we are seeing early demonstrations of transceivers and components meeting this bandwidth. This presentation will provide an overview of standards, circuit architectures and design tradeoffs for 28-56Gb/s links. It will start by providing a summary of recent data rate scaling trends and standards for 28-56Gb/s and show where wireline is used in high-performance systems. Next it will describe the key tradeoffs for increasing aggregate bandwidth, including power, channel quality and process technology capability. Then it will discuss how recent standards have balanced these tradeoffs, and describe the implications for circuit architecture and design, including equalization, clocking, modulation and error correction. Finally we will summarize the existing design data points from industry and academic publications for 28-56Gb/s

Speaker Bio

Frank leads the I/O Circuit Technology group within Advanced Design at Intel in Hillsboro, Oregon, where he is a Principal Engineer. His group develops the first wireline I/O circuits for each new CMOS process technology. From 2003 until 2011 he was a member of the Signaling Research group in Intel’s Circuit Research Lab where his work focused on high-speed and low-power transceivers, clocking and on-die measurement techniques. Prior to joining Intel, Frank received the BS, MS, and PhD degrees in electrical engineering from Stanford University. Frank is the chair of the ISSCC Wireline Subcommittee and previously served as an Associate Editor for TCAS-I. He is a past recipient of the ISSCC Jack Kilby Award and TCAS Darlington Best Paper Award and is an IEEE Distinguished Lecturer.