Terri S. Fiez
Publications
"A 475 mV, 4.9 GHz enhanced swing differential Colpitts VCO in 130 nm CMOS with an FoM of 196.2 dBc/Hz",
2010 IEEE Custom Integrated Circuits Conference -CICC 2010IEEE Custom Integrated Circuits Conference 2010, San Jose, CA, IEEE, pp. 1 - 4, 09/2010.
Abstract
"An Ultralow-Power Receiver for Wireless Sensor Networks",
IEEE Journal of Solid-State Circuits, vol. 45, issue 9, pp. 1759 - 1769, 09/2010.
Abstract
"A 2.4GHz wireless transceiver with 0.95nJ/b link energy for multi-hop battery-freewireless sensor networks",
2010 IEEE Symposium on VLSI Circuits2010 Symposium on VLSI Circuits, Honolulu, HI, IEEE, pp. 29 - 30, 06/2010.
Abstract
"A 250 mV, 352 µW low-IF quadrature GPS receiver in 130 nm CMOS",
2010 IEEE Symposium on VLSI Circuits, Honolulu, HI, IEEE, pp. 135 - 136, 06/2010.
Abstract
"Comparison of supply noise and substrate noise reduction in SiGe BiCMOS and FDSOI processes",
2009 10th International Symposium on Quality of Electronic Design (ISQED), San Jose, CA, IEEE, pp. 112 - 115, 03/2009.
Abstract
"A manipulative rich approach to first year electrical engineering education",
2008 IEEE Frontiers in Education Conference (FIE), Saratoga Springs, NY, IEEE, pp. F1D-10 - F1D-15, 10/2008.
Abstract
"Work in progress - implementing a freshman mentor program",
2008 IEEE Frontiers in Education Conference (FIE)2008 38th Annual Frontiers in Education Conference, Saratoga Springs, NY, IEEE, pp. F2H-1 - F2H-2, 10/2008.
Abstract
"Work in progress - improving self-efficacy with a freshman mentor program",
2008 IEEE Frontiers in Education Conference (FIE), Saratoga Springs, NY, IEEE, pp. F3D-5 - F3D-6, 10/2008.
Abstract
"A 0.4 nJ/b 900MHz CMOS BFSK super-regenerative receiver",
2008 IEEE Custom Integrated Circuits Conference - CICC 2008, San Jose, CA, IEEE, pp. 591 - 594, 09/2008.
Abstract
"A 900-MHz low-power transmitter with fast frequency calibration for wireless sensor networks",
2008 IEEE Custom Integrated Circuits Conference - CICC 20082008 IEEE Custom Integrated Circuits Conference, San Jose, CA, IEEE, pp. 595 - 598, 09/2008.
Abstract
"Extraction of Parasitics in Inhomogeneous Substrates With a New Green Function-Based Method",
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 27, issue 9, pp. 1595 - 1606, 09/2008.
Abstract
"Automated Extraction of Model Parameters for Noise Coupling Analysis in Silicon Substrates",
2007 IEEE Custom Integrated Circuits Conference, San Jose, CA, IEEE, pp. 853 - 856, 09/2007.
Abstract
"Simulation and Modeling of Substrate Noise Generation from Synchronous and Asynchronous Digital Logic Circuits",
2007 IEEE Custom Integrated Circuits Conference, San Jose, CA, IEEE, pp. 845 - 848, 09/2007.
Abstract
"A Low Power BFSK Super-Regenerative Transceiver",
2007 IEEE International Symposium on Circuits and Systems, New Orleans, LA, IEEE, pp. 3099 - 3102, 05/2007.
Abstract
"Tradeoffs in the Design of CMOS Receivers for Low Power Wireless Sensor Networks",
2007 IEEE International Symposium on Circuits and Systems, New Orleans, LA, IEEE, pp. 1345 - 1348, 05/2007.
Abstract
"Schematic-Driven Substrate Noise Coupling Analysis in Mixed-Signal IC Designs",
IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 53, issue 12, pp. 2578 - 2587, 12/2006.
Abstract
"Comparison and Impact of Substrate Noise Generated by Clocked and Clockless Digital Circuitry",
IEEE Custom Integrated Circuits Conference 2006, San Jose, CA, IEEE, pp. 105 - 108, 09/2006.
Abstract
"Efficient Far-Field Radio Frequency Power Conversion System for Passively Powered Sensor Networks",
IEEE Custom Integrated Circuits Conference 2006, San Jose, CA, IEEE, pp. 293 - 296, 09/2006.
Abstract
"Sizing Ground Taps to Minimize Substrate Noise Coupling in RF LNAs",
IEEE Custom Integrated Circuits Conference 2006, San Jose, CA, IEEE, pp. 729 - 732, 09/2006.
Abstract
"Piezoelectric Micro-Power Generation Interface Circuits",
IEEE Journal of Solid-State Circuits, vol. 41, issue 6, pp. 1411 - 1420, 06/2006.
Abstract
"An error control method for application of the discrete cosine transform to extraction of substrate parasitics in ICs",
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 25, issue 5, pp. 932 - 938, 05/2006.
Abstract
"A Comparison of Substrate Noise Coupling in Lightly and Heavily Doped CMOS Processes for 2.4-GHz LNAs",
IEEE Journal of Solid-State Circuits, vol. 41, issue 3, pp. 574 - 587, 03/2006.
Abstract
"Modeling of Substrate Noise Coupling for nMOS Transistors in Heavily Doped Substrates",
IEEE Transactions on Electron Devices, vol. 52, issue 8, pp. 1880 - 1886, 08/2005.
Abstract
"Accurate prediction of substrate parasitics in heavily doped CMOS processes using a calibrated boundary element solver",
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 13, issue 7, pp. 843 - 851, 07/2005.
Abstract
"A Green function-based parasitic extraction method for inhomogeneous substrate layers",
2005 42nd Design Automation ConferenceProceedings, Anaheim, CA, IEEE, pp. 141 - 146, 06/2005.
Abstract


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