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Research Activities
We are developing efficient codes for unidirectional/asymmetric errors in the area of error control coding. Simple and efficient design of encoder/decoder algorithms are also being studied. Further, we have been developing efficient design methods for balanced codes, where each codeword contains equal number of 1's and 0's. In the area of VLSI testing, we are investigating new and efficient methods for compression testing. Our research also involves the application of these schemes for built-in-self-testing in VLSI systems. Efficient design of communications algorithms, mapping algorithms, etc., with or without some faulty nodes in different networks are some of the parallel processing research problems that we are currently investigating. Furthermore, using coding theory, some topological properties of different networks are being developed
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