Patrick Chiang
Assistant Professor
School of Electrical Engineering and Computer Science
Oregon State University
1148 Kelley Engineering Center
Corvallis, OR 97331-5501

Biography
Patrick Chiang received the B.S. degree in electrical engineering and computer sciences from the University of California, Berkeley, in 1997, and the M.S. and Ph.D. degrees in electrical engineering from Stanford University in 2001 and 2006.

In 1998, he was with Datapath Systems (now LSI Logic), working on analog front-ends for DSL chipsets. In 2002 he was a research intern at Velio Communications (now Rambus) working on 10GHz clock synthesis architectures. In 2004 he was a consultant at startup Telegent Systems, evaluating low phase noise VCOs for CMOS mobile TV tuners. In 2006 he was a visiting NSF postdoctoral researcher at Tsinghua University, China, investigating low power, low voltage RF transceivers.

His interests are in the design and implementation of new architectures for mixed signal circuits in deep submicron CMOS. In high speed serial links, his interests include the design of low power, high data rate, parallel I/O's; and the implementation of 20+ GHz, 4-5 bit low power ADCs for limited bandwidth channels. In RF circuits, his research revolves around the design of reconfigurable, self-healing RF transceivers to compensate for process variation in future CMOS technologies.