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Research Collaboration: Research Faculty

Ben Lee
Research Activities


Research Areas

Computer architecture, parallel processing, dataflow architectures, processor allocation in multiprocessor systems, multithreaded systems, and network multimedia systems


Research Description
My research areas encompass computer architecture, high-speed communication, and micro-mobility protocols. In computer architecture, we are researching on dynamic multithreading that allows multiple threads to be generated on the fly and execute them on a superscalar processor with support for checking dependencies among threads. For high-speed communication, there has been much research effort toward low-latency communication protocols and network interfaces. Since communication protocols closely interact with the kernel, device driver, and network interface, these interactions must be properly captured to evaluate the protocols and to improve on them. My research focuses on the design of high-speed communication systems using complete system simulation to capture and analyze all aspects of communication performance. In particular, we are looking at ways to make network interfaces less peripheral to improve the performance. For micro-mobility protocols, handoff delay is one of the most critical issues. In particular, we are interested in how these handoff delays affect the delivery of multimedia steams in wireless campus networks. We are currently looking at ways to minimize handoff delays by dynamically adjusting when and how handoffs should occur.


Applications of Research
Solving these issues are critical to making processors run faster, communication systems to speedup delivery of data, and viewing of high quality multimedia data on portable devices.


Recent Research Collaborations & Projects

  1. "Performance Improvement of the Host Channel Adapter for InfiniBand Using Linux/SimOS," Electronics and Telecommunications Research Institute, $35,000, June 1, 2003 to November 30, 2003
  2. "Design of Configurable Instruction Set and Development of Configurable ISA Simulator," Electronics and Telecommunications Research Institute, $75,141, June 1, 2003 to December 31, 2003
  3. "Broadband Wireless Technology," (with David Porter and Thanit Puthpongsiriporn), 2003 Intel Curriculum Fellowship, Recruitment & Retention, and Student Labs, $30,000
  4. "ETRI Reconfigurable RISC Core: Architectural Prototyping and Implementation," Electronics and Telecommunications Research Institute, $75,142, June 1, 2002 to December 31, 2002
  5. "Curriculum Development for Digital Logic based on FPGA Technologies," (with Alex Tenca and Roger Traylor), 2002 Intel Curriculum Fellowship and Student Labs, $25,689
  6. Oregon University System Engineering and Computer Science Program: "Performance testing of ADC technology and heterogeneous wireless LAN systems," (with D. Porter, D.S. Kim and R. Billo), June 2002-Dec. 2003, $122,947
  7. Electronics and Telecommunications Research Institute (ETRI): "ETRI reconfigurable RISC core: Architectural prototyping and implementation," June-Dec. 2002, $75,142
  8. Electronics and Telecommunications Research Institute: "Design and performance evaluation of a host channel adapter for InfiniBand architecture using Linux/SimOS," May-Nov, 2002, $54,532
  9. Hewlett Packard: "Initiative in mobile technology solutions, phase 2," (with D. Porter, T. Doolan and A. Tenca) 2002, $99,473 (+$141,364 College of Engineering matching).
  10. Electronics and Telecommunications Research Institute: "Performance evaluation of host channel adapter for the InfiniBand architecture," June 2001-Feb. 2002, $29,190
  11. Hewlett Packard: "Initiative in mobile technology solutions, phase 1," (with D. Porter and T. Doolan) 2001, $233,320
  12. Tektronix: "Architecture and issues for gigabit to desktop," June 1999-May 2000, $42,392
  13. Electronics and Telecommunications Research Institute: "Design of high-speed network interfaces," June 1999-Jan. 2000, $37,719
  14. Electronics and Telecommunications Research Institute: "Architectural support for multithreading on a quad-processor multiprocessor chip," July 1996-June 1999, $189,845
  15. National Academy of Sciences: "Smart parking lot with just in time shuttle," (with J. Van Vechten, S.L. Lu and C. Bell) 1998, $64,244



School of Electrical Engineering and Computer Science, 1148 Kelley Engineering Center
Oregon State University, Corvallis, OR 97331-5501
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