Journal Papers

• X. Duan and K. Mayaram, "Robust simulation of high-Q oscillators using a homotopy based harmonic balance method," accepted IEEE Trans. Computer-Aided Design, 2006.
• X. Duan and K. Mayaram, "Frequency-domain simulation of ring oscillators with a multiple-probe method," accepted IEEE Trans. Computer-Aided Design, 2006.
• Y. Hu and K. Mayaram, “A comparison of algorithms for frequency domain coupled device and circuit simulation, accepted IEEE Trans. Computer-Aided Design, 2005.
• T. T. Le, J. Han, A. Von Jouanne, K. Mayaram, and T. S. Fiez, "Piezoelectric micro-power generation interface circuits," accepted IEEE J. Solid-State Circuits, 2006.
• C. Xu, T. Fiez, and K. Mayaram, "An error control method for application of the discrete cosine transform to extraction of substrate parasitics in ICs," IEEE Trans. Computer-Aided Design, pp. 932-938, May 2006.
• S. Hazenboom, T. S. Fiez, and K. Mayaram, "A comparison of substrate noise coupling in lightly and heavily doped CMOS processes for 2.4GHz LNA's," IEEE J. Solid-State Circuits, pp. 574-587, March 2006.
• S. Hsu, T. S. Fiez, and K. Mayaram, "Modeling of substrate noise coupling for NMOS transistors in heavily doped substrates," IEEE Trans. Electron Devices, pp. 1880-1886, Aug. 2005.
• X. Duan and K. Mayaram, "An efficient and robust method for ring oscillator simulation using the harmonic balance method," IEEE Trans. Computer-Aided Design, pp. 1225-1233, Aug. 2005.
• A. Sharma, P. Birrer, S. K. Arunachalam, C. Xu, T. S. Fiez, and K. Mayaram, "Accurate prediction of substrate parasitics in heavily doped CMOS processes using a calibrated boundary element solver," IEEE Trans. VLSI, pp. 843-851, July 2005.
• C. Xu, T. Fiez, and K. Mayaram, "On the numerical stability of Green's function for substrate coupling in integrated circuits," IEEE Trans. Computer-Aided Design, vol. 24, pp. 653-658, April 2005.
• M. Behera, V. Kratyuk, S. De, N. Aluru, Y. Hu, and K. Mayaram, "Accurate simulation of RF MEMS VCO performance including phase noise," IEEE/ASME Journal of Microelectromechanical Systems, vol. 14, pp. 313-325, April 2005.
• H. Habal, K. Mayaram, and T. S. Fiez, "Accurate and efficient simulation of synchronous digital switching noise in systems on a chip," IEEE Trans. VLSI, vol. 13, pp. 330-338, March 2005.
• B. Owens, S. Adluri, P. Birrer, R. Shreeve, S. Arunachalam, K. Mayaram, and T. S. Fiez, "Simulation and measurement of supply and substrate noise in mixed-signal ICs," IEEE J. Solid-State Circuits, vol. 40, pp. 382-391, Feb. 2005.
• Z. Li, R. Suravarapu, K. Mayaram, and C.-J. R. Shi, "Automatic extraction of layout-dependent substrate effects for RF MOSFET modeling," IEICE Trans. Fundamentals, vol. E87-A, no. 12, pp. 3309-3317, Dec. 2004.
• P. K. Hanumolu, M. Brownlee, K. Mayaram and U. Moon, "Analysis of charge-pump phase-locked loops," IEEE Trans. CAS I, vol. 51, pp. 1665-1674, Sept. 2004.
• C. Xu, T. S. Fiez, and K. Mayaram, "An efficient formulation for substrate parasitic extraction accounting for nonuniform current distribution," IEEE Trans. CAS I, vol. 51, pp. 1223-1233, June 2004.

Conference Proceedings

• V. Kratyuk, P. K. Hanumolu, K. Ok, K. Mayaram, and U. Moon, "A digital PLL with a stochastic time-to-digital converter," accepted VLSI Symp. 2006, June 2006.
• T. Wu, K. Mayaram, and U. Moon, "An on-chip calibration technique for reducing supply voltage sensitivity in ring oscillators," accepted VLSI Symp. 2006, June 2006.
• T. Wu, U. Moon, and K. Mayaram, "Dependence of LC VCO oscillation frequency on bias current," accepted ISCAS 2006, May 2006.
• M. Brownlee, P. K.Hanumolu, K. Mayaram, and U. Moon "A 0.5GHz to 2.5GHz PLL with fully differential supply regulated tuning," ISSCC, pp.588-589, Feb. 2006.
• A. Nemmani, M. Vandepas, K. Ok, K. Mayaram, and U. Moon, "Design techniques for radiation hardened phase locked loops," Mil. Aero. Prog. Logic Dev. (MAPLD) Int. Conf., Sept. 2005.
• M. Vandepas, K. Ok, A. Nemmani, K. Mayaram, and U. Moon, "Characterization of 1.2GHz phase locked loops and voltage controlled oscillators in a total dose radiation environment," Mil. Aero. Prog. Logic Dev. (MAPLD) Int. Conf., Sept. 2005.
• X. Duan and K. Mayaram, "A multiple-probe approach for robust frequency domain ring oscillator simulation," CICC 2005, pp. 465-468, Sept. 2005.
• C. Xu, R. Gharpurey, T. S. Fiez, and K. Mayaram, "A Green function-based parasitic extraction method for inhomogeneous substrate layers," Proc. DAC 2005, pp. 141 - 146, June 2005.
• T. Wu, P. K. Hanumolu, U. Moon, and K. Mayaram, "An FMDLL based dual-loop frequency synthesizer for 5GHz WLAN applications," Proc. ISCAS 2005, pp. 3986 - 3989, May 2005.
• V. Kratyuk, P. K. Hanumolu, U. Moon, and K. Mayaram, "A low spur fractional-N frequency synthesizer architecture," Proc. ISCAS 2005, pp. 2807 - 2810, May 2005.
• V. Kratyuk, I. Vytyaz, U. Moon, and K. Mayaram, "Analysis of supply and ground noise sensitivity in ring and LC oscillators," Proc. ISCAS 2005, pp. 5986 - 5989, May 2005.
• X. Duan and K. Mayaram, "A new approach for ring oscillator simulation using the harmonic balance method," Proc. IEEE Asia South Pacific Design Automation Conf., pp. 236-239, Jan. 2005.