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MISSION STATEMENT: SUSTAINABLE SILICON

The VLSI research group is exploring novel VLSI circuit and system architectures that enable significant improvements in energy efficiency.

  • Energy-Efficient VLSI Interconnect -- Extreme-scale computing will enable massive parallelism on multiple vertical levels, from hundreds of computational units on a single microprocessor to thousands of processors in a single data center. Unfortunately, the energy required to communicate between these units at every level (on-chip, off-chip, off-rack) will be the critical limitation to energy efficiency (DARPA Exascale Computing Study, 2008). We are developing technologies for energy-efficient interconnect: wireline communications, wireless RF circuits, on-chip router links and crossbars, and analog-digital converters.
  • Energy-Constrained Medical Sensors -- Future implantable and external medical electronics are limited antagonistically by both energy-efficiency and robustness. Energy efficiency results in reduced overhead in battery maintenance and smaller form factor, while system robustness is required to guarantee patient health. We are currently building medical sensors that can adaptively achieve both requirements.

     

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    April 2012
    30-second demo of indoor location tracking, using a cloud-based infrastructure: DEMO

    March 2012
    Congratulations to Dr. Kang-Min Hu, for his accepted paper on a 0.16pJ/b, 8Gbps, Near-Threshold Serial Link Receiver at the IEEE Journal of Solid-State Circuits!

    Our ISCA-2012 paper, in collaboration with Mattan Erez's group at UT-Austin, was accepted!

    February 2012
    Our lab has received a 2012 NSF-CAREER Award: "CAREER: Analog-Assisted Sensing and Repair for Achieving Robust Near-Threshold Computing." link

    Congratulations to Joe Crop for the DAC-2012 paper acceptance: "Regaining Throughput Using Completion Detection for Error-Resilient, Near-Threshold Logic".

    Media coverage our wearable vital-sign monitor in CNET here.

    October 2011
    Our media coverage in Terra Magazine

    Our near-Vt SIMD processor in 45nm-SOI was accepted for publication at ISSCC-2012!

    A featured story on the OSU website: Following Footsteps

    September 2011
    Our lab has been award a 2011 HP Labs Innovation Research Program Grant! pdf

    August 2011
    Body-Area Networks Using UWB

    On the television! 6PM evening news

    In the press! Indoor tracking device.

    June 2011
    Congratulations (again) to Sam, Sean, and Ian for winning 1st place of the Analog Design Contest at Oregon State, sponsored by Texas Instruments!

    Congratulations to Dr. K. Hu, C. Hu, and J. Postman for all three paper acceptances at IEEE Custom Integrated Circuits Conference 2011!

    Congratulations to Xia and Jing-Guang for the accepted phase-calibration paper to TCAS-I.

    Congratulations to Dr. C. Hu and Dr. K. Hu, for finishing your doctoral degrees. Good luck at Marvell and Broadcom.

    Congrats to Ben, Ryan, Sam, Sean, and Ian for the two accepted papers at EMBC this year!

    Congratulations to Robert Pawlowski for winning Teaching Assistant of the year!

    Congratulations to Sam, Sean, and Ian for winning 1st place in the technical challenge for the Senior Design Final Project in 2011!

    May 2011
    Sam House, Sean Connell, and Ian Milligan have been awarded the College of Engineering best Undergraduate Research Project, at the annual CUE (Celebrating Undergraduate Excellence) presentations ceremony.

    April 2011
    Congratulations to Rui Bai and others for accepted TCAS-I paper.

    Congratulations on Kang-Min's duobinary/NRZ modeling journal paper, to be published in T-VLSI.

    February 2011
    Congratulations to Steve Redfield for the journal paper acceptance on UWB channel characterization for future computing servers.

    January 2011
    Recent press about our work on medical devices for aging here.

    Congratulations to Xia, for the IEEE-MTT paper accepted on a 0.15nJ/b, Ultrawideband transceiver.

    Congratulations to Charles, for the Journal of Solid-State Circuits paper acceptance, from RFIC-2010.


    November 2010
    MEMS micro-chamber, fluid dispenser accepted to Micro/Nano Letters.


    October 2010

    Congratuations to Nariman, for getting his MIMO decoder paper accepted to 2011 DATE Conference.


    August 2010

  • Both 65nm-CMOS interconnect link testchips seem to be working well!
  • 45nm-CMOS digital impulse generator is operational!


    July 2010

  • Congratulations to Jacob for the ICCD paper acceptance.

  • 1st-Generation, Wireless Brain Sensor


    June 2010

  • Congratulations to Tao for getting accepted into CICC 2010.


    May 2010

  • Our wireless vital-sign monitoring system makes local television here!
  • Congrats to Evgeni, Robert, and Mattan, for the IEEE Computer Architecture Letters (accepted) about our new near-threshold stream processor -- Synctium!

    April 2010

  • Congrats to Jacob for winning the 2010 NSF Doctoral Fellowship!


    March 2010

  • Two papers accepted at AMA-IEEE conference in Washington DC. Congratulations, Seunjin, Ben, and Ryan!


    February 2010

  • Two papers accepted at RFIC 2010! Congratulations, Karthik and Charles!


    January 2010

  • The VLSI Research Group has been awarded a Department of Energy Early CAREER Award, for research on energy-efficient VLSI interconnect. Press Release


    October 2009:

  • Congrats to Jacob, Karthik, Jing-Guang, and Charles for 1st-pass working silicon!


    July 2009:

  • Joint paper (with Institute of Computing Technology, Chinese Academy of Sciences) is accepted at Asian Solid-State Circuits Conference 2009
  • Good work, Divya, for the 90-CMOS tapeout!
  • Won Best Faculty Project award from NSF Industry-University Research Center--CDADIC (Center for Digital/Analog Design of Integrated Circuits)
  • Doctoral student Kang-Min Hu doing summer internship project on low-power links at Montage Technology, in Shanghai, China.
  • Doctoral student Jacob Postman doing summer research project on multicore as NSF fellow at Institute of Computing Technology, Chinese Academy of Sciences in Beijing, China.
  • Awarded $540k NSF Grant (with Professors Liu/Nguyen) for Next-Generation RF Circuits and Systems for Future Computer Systems, collaborating with Intel as GOALI partner


    May 2009:

  • DFE-embedded SRAM (Jon and Ming) and Asynchronous sub-threshold logic (Robert and Joe) 0.18um CMOS tapeouts with Professor Chi (Tsinghua)
  • Good work, Tao and Charles, for taping out the 40nm-CMOS chips!

    April 2009:
    Congratulations to Jacob, Chris, and Kang-Min (OSU) and Tushar and Prof. Peh (Princeton) for finishing the tapeout of the 90nm-CMOS, 4-core, Network-on-a-Chip


    March 2009:

  • Congratulations to Jacob for getting the NOCHI paper (with Li-Shiuan Peh of Princeton and Mattan Erez of UT-Austin) accepted into IEEE-Micro
  • Congratulations to Kang-Min for getting the 0.6mW/Gbps high-speed I/O chip accepted into the 2009 VLSI Circuits Symposium!


    February 2009:

  • Looking for a few excellent undergrads for paid undergraduate research; specifially, to work and test experimentally some prototype test-chips in the lab, collecting data, eventually to publish a research paper


    January 2009:

  • Published a number of joint papers with Professor Baoyong Chi (Tsinghua University, China) and Professor Weiwu Hu (Chinese Academy of Sciences, China).
  • Congratulations to Kang-Min, Tao Jiang, and Divya! All three papers accepted to ISCAS 2009.
  • Happy New Year for 2009. Hope to have a lot of really cool stuff for the new year.


    December 2008

  • Congrats to Jing-Guang and Kang-Min. The 90nm CMOS test-chips seem to be working remarkably well!
  • Two papers accepted at VLSI - DAT conference, April 2009. Congratulations Charles and Karthik.
  • Visiting ITRI(Taipei), Chinese Academy of Sciences (Beijing), Tsinghua (Beijing), Shanghai JiaoTong (Shanghai), Fudan (Shanghai)
  • Kang-Min measuring chip at LSI (Mipitas, CA)
  • November 2008

  • Jing-Guang successfully defends M.S. thesis. Good luck at Broadcom!
  • Talk at Santa Barbara
  • October 2008

  • Meeting on SAR-ADC at LSI-Logic
  • Three 90nm chips testing now. Looking good!
  • Four papers submitted to ISCAS
  • One paper submitted to VLSI-DAT

    September 2008:

  • Visit to ST-Micro in Crolles, France
  • Looking for a grad or advanced undergrad with experience in LabView, data acquisition, and testchip/computer test scan interfaces
  • Looking for enthusiastic, ambitious students looking to work on two possible senior design projects
  • One tapeout in 90nm CMOS: UWB transceiver
  • New website is up and running
  • New students Jacob and Divya join!

    August 2008:
  • Two chips taped out in 0.18um CMOS
  • New paper presented at Hot Interconnect 2008.
  • Press's review of the Paper in Electronics Design News

    June 2008:
    Three new tapeouts in 90nm CMOS: phase calibration; low-power, 10Gbps receivers; low-power, DFEs and injection-locked ring oscillators

    September 2007:
    Four tapeouts in 65nm CMOS


     

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    Patrick Chiang
    Assistant Professor

    Kelley Engineering Center, #4103
    Oregon State University
    Corvallis, OR
    97331-5501
    Phone: (541) 737-5551; Fax: (541) 737-1300
    Email: pchiang@ece.oregonstate.edu

    Fall 2008 Office Hours: Tuesdays, Thursdays: 12:30PM-2:00PM, KEC 4103
     

     

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