| Title | Date | Designer | Collaborators | Technology | Chip Image |
| Micropowered Wireless Non-contact EEG Sensor-on-a-Chip
In submission
|
Oct. 2011 |
Derek Chen (DS-ADC), Joe Crop (Low-VDD MSP430), Jiao Cheng (MICS-TX), Charles Hu (MICS-RX), Chao Ma |
Gert Cauwenberghs, UCSD |
90nm-CMOS |
 |
| Synctium-I: 0.53V-1.0V SIMD Processor with Variation Resiliency
Accepted, ISSCC-2012
|
Sep. 2011 |
Robert Pawlowski |
Mattan Erez, UT-Austin |
45nm-SOI |
 |
| MEMS Pressurized-Burst Microwells
Accepted, Micro/Nano Letters 2011 |
Sep. 2006 |
Tina Lamers, Patrick Chiang |
Stanford University, Avago Technologies |
Stanford Nanofabrication Facility |
 |
| 4b, 8GSs Flash ADC in 65nm-CMOS Accepted, Transactions on Circuits and Systems I, 2011 |
Sep. 2010 |
Rui Bai and Jing-Guang Wang (PhD) |
Institute of Computing Technology, Chinese Academy of Sciences |
65nm-CMOS |
 |
| Energy-Scalable, On-Chip Transceivers
Accepted, IEEE Custom Integrated Circuits Conference 2011
|
Sep. 2010 |
Jacob Postman (PhD) |
Department of Energy; NSF Doctoral Fellowship |
65nm-CMOS |
 |
| All-Digital 3-50GHz Impulse Radio Transmitter with PVT Compensation
Accepted, IEEE Custom Integrated Circuits Conference 2011
|
Sep. 2010 |
Charles Hu (PhD) |
|
40nm-CMOS |
 |
| Near-Threshold(Vdd=0.65V), 8Gbps Serial Link Receiver
Accepted, IEEE Custom Integrated Circuits Conference 2011
|
Sep. 2010 |
Kang-Min Hu (PhD) |
Prof. Palermo, Texas A&M |
65nm-CMOS |
 |
| 1.3GSs, 6b, 5mW SAR-ADC IEEE Custom Integrated Circuits Conference 2010 (CICC) |
Mar. 2010 |
Tao Jiang (PhD) |
LSI Corporation |
40nm-CMOS |
 |
| Sine-Wave Sampling for Multi-Gigahertz ADCs
Accepted, Transactions on Circuits and Systems I, 2011
|
Feb. 2010 |
Divya Kesharwani (MS) |
|
90nm-CMOS |
 |
| 0.6mW/Gbps, 6.4-7.2Gbps Serial Link Receiver IEEE VLSI Circuits Symposium 2009 |
Dec. 2008 |
Kang-Min Hu (PhD) |
Intel Circuits Research Laboratory
| 90nm-CMOS |
 |
| 500Mbps, 182pJ/b UWB-RF Transceiver IEEE Radio Frequency Integrated Circuits Conference 2010 (RFIC) |
July 2009 |
Charles Hu (PhD) |
Intel DEG |
90nm-CMOS |
 |
| Four-Core, Network-on-a-Chip with Energy-Efficient On-Die Interconnect
2010 International Conference on Computer Design (ICCD) |
Sep. 2009 |
Jacob Postman (PhD) |
Li-Shiuan Peh (MIT) |
90nm-CMOS |
 |
| On-Die, Multi-Phase Timing Calibration
Accepted, Transactions on Circuits and Systems I, 2011
|
Nov. 2008 |
Jing-Guang Wang (MS) |
|
90nm-CMOS |
 |
| Reconfigurable, Dynamic Voltage-Scaling 2.4GHz LNA IEEE Radio Frequency Integrated Circuits Conference 2010 (RFIC) |
Sep. 2009 |
Karthik Jayaraman (MS) |
Tsinghua University, China |
180nm-CMOS |
 |