ECE/CS 472/572: Computer Architecture
Book(required) : Computer Organization and Design; Authors: Patterson and Hennessy
Location: Tu/Thurs 10:00AM -- 11:40AM
Room: COVL 218
Dates: 09/29/09 - 12/05/09
Instructor: Assistant Professor Patrick Chiang
Office Hours: WED, 2-4PM, KEC4103
NOTE: Check the NEWS/CLASS UPDATES often for updates to issues/etc.
TA/Project Lead: Due to budget cuts, there are no 'official' TAs this quarter. We will have two 'unofficial'
TAs, who are my graduate students.
Jacob Postman, postmaja@onid.orst.edu
Office Hours: Thursdays, 6-8PM, KEC1130
Administrator: Renee Zhang
Email: rongoct04@gmail.com
Homework/Lab Turn-In: Folder outside office KEC4103
Grading Policy
Class Participation -- plus, check, or minus
Homework-- %20
Exam #1 -- %20
Exam #2 -- %20
Labs / Final Project -- %40
One late homework or lab per quarter
Homework and Project Labs done in groups of 2
Grading policy: plus/check/minus for HWs/LABs
Class participation: I'll annotate on class roster who is participating. When grading time comes,
I'll recognize the ones that are/aren't present. If your
grade is on the border, I will move it up/down 1/2 grade.
No tricks in this class. What is on the homework and the labs will be on the exams.
ECE 572 Students: (Taking Computer Architecture for Graduate credit) Work together with all ECE572 students (2 students/project),
to extend the multi-cycle processor, and synthesize the verilog into P&R flow, using Synopsys
90nm-CMOS-IBM flow. Compare: Area/power/latency for synthesized processor.
Turn in combined report of the synthesized processor.
Class Syllabus (Sep. 29, 2009)
Lecture #1
Lecture #2 and #3
Lecture Notes (Starts at Chapter 3)
Homeworks
NOTE: call the assignment submission: ece472_HW1_jsmith_jdoe.pdf
where: ece472 is the class section you are in, HW1 is name of the
assignment, jsmith and jdoe are the first initial/last names of your names
HW1 Due: Friday, 11:59PM (Oct. 23 -- extended deadline)
SPIM SIMULATOR (for testing out MIPS code)
Sample MIPS code
HW-1a Solutions
HW-1b Solutions
HW2 Due: Friday, 11:59PM (Oct. 23)
Questions in the book (scanned in) for HW2
HW2 Solutions, FALL 2009
Homework #3: 5.28, 5.29, 5.31, 5.36, 5.37, 5.38, 5.51, 6.3, 6.17, 6.18, 6.22
OUT: OCT. 30; IN: NOV. 6
HW3 Solutions, FALL 2009
Homework #4: 6.1, 6.4, 6.19, 6.21, 6.23, 6.30, 6.33, 6.34, 6.36, 6.39, 6.47, 6.48
OUT: NOV. 6; IN: NOV. 13
HW4 Solutions, FALL 2009
Homework #5: 7.1, 7.5, 7.9, 7.10, 7.12, 7.14, 7.19, 7.20, 7.28, 7.33, 7.39, 7.42
OUT: NOV. 13; IN: NOV. 20
Midterm #1 from FA08
Practice Midterm Solutions, from FALL 2008
Midterm #2 EXAM: Nov. 24th (everything through pipelining, caching, and virtual memory)
Sample exams from FA07
Class Projects
NOTES
Links to recent new MIPS architecture
http://www.eetimes.com/news/semi/showArticle.jhtml?articleID=221400180
http://www.techbites.com/20091102879/myblog/blog/z000c-new-mips-uc-cores-32-bit-performance-16-bit-code-size.html
http://www.techbites.com/20091103898/myblog/reviews/z0009-analysis-m14k-and-m14kc-mcu-cores.html
Final Project Notes
(1) Final project presentations: December 3rd, 2009; Assuming 5 minutes per group; about 14-15 groups
(2) A major section of the project grading is completing the final pipelined processor, as well as the 5 minute presentation. (i.e. doing
laboratory #1 is no replacement for not doing lab #5)
(3) For the final project, give a 2-page summary of the paper "view from berkeley":
Parallel Computing (Berkeley)
Krste Asanovic paper, tititled: A View of the Parallel Computing Landscape (USE ieeexplore or google)
Answer the questions:
a. What is the most important problem for future multicore computing?
b. Do you find this, in general, to be a software or a hardware dominated problem? Why?
c. Is this the most important problem of our lifetime(s)? Compared to alternative energy issues, health-care
applications issues? Or is there another more important issue that faces us? And why?
Extra Credit
Hardware extra credit: Same project as that of the Graduate Student project above
Software Extra Credit: CUDA (see Class Projects Link)