ECE 271- Digital Logic Design

Catalog Description: A first course in digital logic design using small and medium scale integrated circuits.

Prerequisites:

By course: Sophomore standing in engineering
By topic: Basic math concepts

Courses that require this as a prerequisite: ECE 272, ECE 375

Credits: 3 Terms Offered: Spring annually

Instructors:

Primary: A. Tenca
Secondary: C. Koç

Textbook: Digital Design: Principles and Practices, J. F. Wakerly, Third Edition, Prentice Hall, 2001, ISBN 0-13-089896-1

References:

• Mano, Logic & Computer Design Fundamentals - 2nd updated Edition (W/2 CD'S), Prentice Hall ISBN

Course Learning Objectives:
Students must demostrate the ability to:

1. Map the high-level description of a digital system into a binary description of it. (ABET Outcomes: a,m)
2. Analyze and design combinational systems using standard gates and minimization methods (such as Karnaugh maps). (ABET Outcomes: a,c,n)
3. Analyze and design combinational systems composed of standard combinational modules, such as multiplexers and decoders. (ABET Outcomes: a,c,n)
4. Analyze and design simple synchronous sequential systems. (ABET Outcomes: a,c,n)
5. Analyze and design sequential systems composed of standard sequential modules, such as counters and registers. (ABET Outcomes: a,c,n)
6. Analyze and design simple systems composed of programmable logic, such as ROMs and PLAs. (ABET Outcomes: a,c,n)
7. Perform basic arithmetic operations with signed integers represented in binary (ABET Outcomes: a,m,n)

Topics

• Concepts and definitions used in digital logic design: notation, number systems, difference between analog and digital system, specification and implementation, analysis and design, design cycle, CAD tools, combinational systems, high-level specs, data representation and coding, binary specs, switching functions (truth tables), gates.
• Boolean (switching) algebra and switching expressions.
• Integrated circuits: characteristics and capabilities, overview of CMOS technology.
• Gate networks: definition, description. Sets of gates. NAND-NAND and NOR-NOR networks.
• Analysis of gate networks (combinational system). Characteristics of gate networks.
• Design of combinational systems. 2-level networks. Minimal two-level nets, Karnaugh maps.
• Standard combinational modules: decoders, encoders, priority encoders, multiplexers, demultiplexers, and combinational shifters. Multiplexers as universal modules.
• PLAs and PALs, networks with XOR gates.
• Specification of sequential systems, state description of sequential systems, Mealy and Moore machines, state diagram, time behavior, and binary specification.
• Sequential networks, canonical nets, gated latch and D flip-flop, other flip-flops: SR, JK, and T.
• Analysis/Design of sequential networks.
• Standard sequential modules: registers, shift registers, and counters.
• Design of sequential systems using counters or special state assignments.
• Controllers and state minimization of sequential systems.
• Arithmetic combinational modules. Adders for positive integers: full-adder and carry lookahead adder. Representation of signed integers and operations: addition and subtraction. ALU and comparator modules.
• Programmable devices: programmable sequential arrays (PSA), ROM, and circuits with ROMs. Networks of programmable modules and FPGAs.

Structure: Three 50-minute lectures per week.

Original: 4/01
Revised: