ECE 418- Semiconductor Processing

Catalog Description: Theory and practice of basic semiconductor processing techniques. Introduction to process simulation.

Prerequisites:

By course: ECE317
By topic: Basic principles and operation of MOS capacitors, Basic principles and operation of MOS transistors.

Courses that require this as a prerequisite: None

Credits: 3 Terms Offered: Spring

Instructors:

Primary: S. Subramanian
Secondary: J. Wager

Textbook: Introduction to Microelectronic Fabrication, Volume V, Modular Series on Solid State Devices, Richard C. Jeager, Addison Wesley, 1988. ISBN: 0-201-14695-9.

References: Semiconductor Integrated Circuit Processing Technology, W.R. Runyan and K.E. Bean, Addison Wesley, 1990. ISBN: 0-201-10831-3.

Course Learning Objectives:
The student will demonstrate the ability to:

  1. Design and perform dry and wet oxidation of silicon wafers in the laboratory and calculate the expected thickness of the oxide from the process conditions. (ABET outcomes a,b,c)
  2. Fabricate Al gate MOS capacitors on silicon wafers in the laboratory and perform capacitance-voltage (C-V) measurements (ABET outcomes a,b)
  3. Determine the substrate type and calculate the doping concentration in the substrate, flat band voltage, threshold voltage and the oxide charge form the measured C-V curves. (ABET outcomes a,b)
  4. Design and perform a two step diffusion process in the laboratory and calculate the junction depth and sheet resistance of the diffused layer from the process conditions. (ABET outcomes a,b,c)
  5. Fabricate a simple MOS transistor (gate length ~ 10 mm) using a four stage photolithography process and measure the current - voltage (I-V) characteristics. Determine the threshold voltage and the transconductance from the measured I-V curves. (ABET outcomes a,b)
  6. Write a simple SUPREM3 program to determine the oxide thickness, junction depth and sheet resistance of diffused or ion-implanted layers. (ABET outcome k)
  7. Prepare two reports on projects involving fabrications and characterizations of MOS capacitors and transistors. (ABET Outcome g)

Topics

Laboratory Projects

Structure: One 1 hour and 20 minute lecture every week. Two 3 hour and 20 minute labs every week.

Original: 4/01
Revised: 9/01


School of Electrical Engineering and Computer Science, 1148 Kelley Engineering Center
Oregon State University, Corvallis, OR 97331-5501
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