ECE 471- Advanced Digital Design

Catalog Description: Theory of digital logic design, finite state machine design and analysis, digital system testing and design for testability, high-level hardware description languages.

Prerequisites:

By course: ECE 375. Lec.
By topic: Basic knowledge of combinational digital logic: gates, switching functions and expressions, boolean algebra, gate networks and Kmaps, Basic knowledge of sequential digital logic: flip-flops, state diagrams, finite state machine concepts, Knowledge of basic combinational and sequential modules: multiplexer, binary decoder/decoder, adder, and binary counter, Basic concepts of computer arithmetic: addition and subtraction in one and two's complement number systems, Knowledge of signed integer number's representation and digit coding, Some exposure to programming languages (preferably C), Basic knowledge of CPU architecture and instruction set.

Courses that require this as a prerequisite: none

Credits: 4 Terms Offered: Winter annually

Instructors:

Primary: A. Tenca
Secondary: C. Koç

Textbook:

  1. Tenca, A. F., ECE471 - Advanced Digital Design Class Notes, unpublished, 2000
  2. Yalamanchili, S., Introductory VHDL from Simulation to Synthesis, Prentice Hall, 2001. ISBN 0-13-080982-9

Course Learning Objectives:
Students must demostrate the ability to:

  1. Design and analyze median complexity combinational systems.
    (ABET Outcomes: a, c, k)
  2. Design and analyze median complexity sequential systems.
    (ABET Outcomes: a, c, k)
  3. Describe and simulate digital systems using Computer Aided Design Tools.
    (ABET Outcomes: b, c, j, k)
  4. Analyze problems/solutions related to Design for Testability issues in digital systems.
    (ABET Outcomes: a, j)
  5. Describe and simulate combinational digital systems using a Hardware Description Language and its simulation environment.
    (ABET Outcomes: b, c, j, k)
  6. Describe and simulate sequential digital systems using a Hardware Description Language (HDL) and its simulation environment.
    (ABET Outcomes: b, c, j, k)

Topics

Structure: Two 110-minute lectures per week. Laboratory work - projects on the use of CAD and HDL.

Original: 1/01
Revised:



School of Electrical Engineering and Computer Science, 1148 Kelley Engineering Center
Oregon State University, Corvallis, OR 97331-5501
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