ECE 472- Computer Architecture

Catalog Description: Computer architecture using processors, memories and I/O devices as building blocks. Issues involved in the design of instruction set architecture, processor, pipelining and memory organization. Design philosophies and trade-offs involved in Reduced Instruction Set Computer (RISC) architectures.

Prerequisites:

By course: ECE 375. Crosslisted as CS 472/572.
By topic: Computer system architecture and instruction sets, Fetch and execute cycles for a small computer, Register transfer operations, Control unit operation, Input-Output structure, Memory structures.

Courses that require this as a prerequisite: ECE 570 and ECE 576

Credits: 4 Terms Offered: Fall

Instructors:

Primary: B. Lee
Secondary: R. Traylor

Textbook: Patterson and Hennessey, Computer Organization and Design: The Hardware/Software Interface, Morgan Kaufmann, 1998. ISBN 1-55860-428-6.

Course Learning Objectives:
Students must demonstrate the ability to:

1. Design a complete instruction set architecture (ISA) ISA for a simple computer. (ABET Outcome: a, c, e)
2. Implement the datapath and control hardware of a simple computer.
   (ABET Outcome: k)
3. Determine the performance characteristics of different computer systems. (ABET Outcome: b)
4. Assess the impact of adding, subtracting or altering instructions on the performance of a computer system. (ABET Outcome: b)

Topics

• Fundamentals of computer architecture.
• Instruction set architecture
• Arithmetic and logic design and implementation.
• Control unit design, memory hierarchy, cache memory, virtual memory.
• Input/Output design, interrupts, DMA.
• Pipelines.
  

Structure: Two 100 minute lectures per week.

Original: 9/00
Revised: 9/01