ROGER L. TRAYLOR
Instructor
Education
  

1991

Master of Science, Electrical Engineering
Oregon State University, Corvallis, Oregon
1981

Bachelor of Science, Electrical Engineering
Tennessee Technological University, Cookeville, Tennessee
Professional Experience
  
Academic
1996-present


Instructional Support Assistant
Department of Electrical and Computer Engineering
Oregon State University, Corvallis, Oregon

Non-academic
1994-1996


Senior Engineer
Intel Corp. Personal Conferencing Division, Hillsboro, Oregon
1987 - 1994
 Staff Engineer
Intel Corp., Supercomputer Systems Division, Beaverton, Oregon
1981 - 1985
 Design Engineer
GTE Products Corp., Westborough, Massachusetts

Patents

"Dataflow Computer with an Articulated First-In, First-Out Content Addressable Memory" US. Patent #5,301,141

"Self-Timed Data Pipeline Apparatus using Asynchronous Stages Having Toggle Flip-Flops " US. Patent #5,386,585

"FIFO Buffer with Full/Empty Detection by Comparing Respective Registers in Read and Write Circular Shift Registers" US. Patent # 5,473,756

"Method and apparatus for draining video data from a planarized video buffer" US. Patent 5,982,425
Primary Teaching Responsibilities
 ECE 472, ECE 112, ECE 474
   
   
   

School of Electrical Engineering and Computer Science, 1148 Kelley Engineering Center
Oregon State University, Corvallis, OR 97331-5501
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