10:00 am – 2:00 pm (EDT), June 19, 2021
Lizhong Chen, Oregon State University
|Keynote I: “Machine-Learning for Control and Noise-Mitigation in Quantum Computer Systems”
Fred Chong, University of Chicago
|Invited talk: “Architecture Design Automation using Machine Learning”
Jieming Yin, Lehigh University
|Invited talk: “Using Machine Learning for Dynamic Hardware Prediction”
Akanksha Jain, Google
|Keynote II: “NAAS: Neural Accelerator Architecture Search”
Song Han, MIT
|Invited talk: “Learning-based Task Management for Interactive Cloud Services”
Rajiv Nishtala, Coop Norge
|Invited talk: “Sparsity: Challenges and Opportunities for AI-Assisted Architecture Design”
Bahar Asgari, Google / University of Maryland, College Park
Dr. Fred Chong (Keynote Speaker)
Seymour Goodman Professor
Dept. of Computer Science, University of Chicago
Co-Founder and Chief Scientist, Super.tech
Bio: Fred Chong is the Seymour Goodman Professor in the Department of Computer Science at the University of Chicago and the Chief Scientist at Super.tech. He is also Lead Principal Investigator for the EPiQC Project (Enabling Practical-scale Quantum Computing), an NSF Expedition in Computing. Chong received his Ph.D. from MIT in 1996 and was a faculty member and Chancellor’s fellow at UC Davis from 1997-2005. He was also a Professor of Computer Science, Director of Computer Engineering, and Director of the Greenscale Center for Energy-Efficient Computing at UCSB from 2005-2015. He is a recipient of the NSF CAREER award, the Intel Outstanding Researcher Award, and 10 best paper awards. His research interests include emerging technologies for computing, quantum computing, multicore and embedded architectures, computer security, and sustainable computing. Prof. Chong has been funded by NSF, DOE, Intel, Google, AFOSR, IARPA, DARPA, Mitsubishi, Altera and Xilinx. He has led or co-led over $40M in awarded research, and been co-PI on an additional $41M.
Title: Machine-Learning for Control and Noise-Mitigation in Quantum Computer Systems
Dr. Jieming Yin
Department of Electrical and Computer Engineering
P.C. Rossin College of Engineering and Applied Science
Bio: Jieming Yin is an Assistant Professor with the Department of Electrical and Computer Engineering at Lehigh University. Prior to joining Lehigh, he was a researcher at AMD Research, where he worked on FastForward Project and PathForward Project funded by the Department of Energy, aiming to build the nation’s first exascale supercomputers. He obtained his PhD in Computer Science from University of Minnesota-Twin Cities in 2015. His research interests lie in computer architecture, with emphasis on SoC system integration, network on chips, and machine learning aided computer system design. His work on modular-routing design for chiplet-based systems was featured in IEEE Spectrum. Jieming Yin has published a number of papers in top-tier conference venues, and he holds over 10 US patents and patent applications.
Title: Architecture Design Automation using Machine Learning
Dr. Akanksha Jain
Bio: Akanksha Jain recently joined Google and was a Research Engineer at Arm prior to that. She received her Ph.D. in Computer Science from The University of Texas in August 2016. In 2009, she received the B.Tech and M. Tech degrees in Computer Science and Engineering from the Indian Institute of Technology Madras. Her research interests are in computer architecture, with a particular focus on the memory system and on using machine learning techniques to improve the design of memory system optimizations.
Title: Using Machine Learning for Dynamic Hardware Prediction
Dr. Song Han (Keynote Speaker)
Electrical Engineering and Computer Science
Massachusetts Institute of Technology
Bio: Song Han is an assistant professor at MIT’s EECS. He received his PhD degree from Stanford University. His research focuses on efficient deep learning computing. He proposed “deep compression” technique that can reduce neural network size by an order of magnitude without losing accuracy, and the hardware implementation “efficient inference engine” that first exploited pruning and weight sparsity in deep learning accelerators. His team’s work on hardware-aware neural architecture search that bring deep learning to IoT devices was highlighted by MIT News, Wired, Qualcomm News, VentureBeat, IEEE Spectrum, integrated in PyTorch and AutoGluon, and received many low-power computer vision contest awards in flagship AI conferences (CVPR’19, ICCV’19 and NeurIPS’19). Song received Best Paper awards at ICLR’16 and FPGA’17, Amazon Machine Learning Research Award, SONY Faculty Award, Facebook Faculty Award, NVIDIA Academic Partnership Award. Song was named “35 Innovators Under 35” by MIT Technology Review for his contribution on “deep compression” technique that “lets powerful artificial intelligence (AI) programs run more efficiently on low-power mobile devices.” Song received the NSF CAREER Award for “efficient algorithms and hardware for accelerated machine learning” and the IEEE “AIs 10 to Watch: The Future of AI” award.
Title: NAAS: Neural Accelerator Architecture Search
Dr. Rajiv Nishtala
Bio: Rajiv Nishtala is a Data Scientist at Coop, Norway. He received a Bachelor degree from ICFAI University, India in 2011 and a Master degree from FH Heidelberg, Germany in 2013 He did the work on his master thesis at the University of Pittsburgh, USA as a visiting scholar for a period of six months. He finished his Ph.D. at the Polytechnic University of Catalonia and the Barcelona Supercomputing Center in 2017. After his doctoral studies, he continued working at BSC for one year and later as a research scientist Norwegian University of Science and Technology. His research focused mostly on harnessing the power of machine learning to optimise resource allocation for highly latency-sensitive cloud workloads while minimising power consumption.
Title: Learning-based Task Management for Interactive Cloud Services
Dr. Bahar Asgari
Google / University of Maryland, College Park
Bio: Bahar Asgari is joining the Department of Computer Science at the University of Maryland, College Park as an assistant professor in Fall 2022. Bahar has joined Google after receiving her Ph.D. degree in Electrical and Computer Engineering from Georgia Tech in May 2021. Her doctoral dissertation, in consultation with her advisors Prof. Sudhakar Yalamanchili and Prof. Hyesoon Kim, focuses on efficiently improving the performance of executing sparse problems. Her proposed low-cost hardware accelerators and hardware/software co-optimization that deal with essential challenges of sparse problems contribute to a widespread application domain from machine learning to scientific computing.
Title: Sparsity: Challenges and Opportunities for AI-Assisted Architecture Design
Abstract: Sparse problems are the main components in several application domains. Today, computers and supercomputers containing millions of CPUs and GPUs are actively involved in executing sparse problems. However, because of the contradiction between the abilities of the hardware and the nature of the sparse problems, even modern high-performance CPUs and GPUs are poorly suited to sparse problems, utilizing only a tiny fraction of their peak performance. As a result, we witness a great effort in designing domain-specific architectures for sparse problems, which propose efficient solutions for today’s sparse problems. However, as we move forward, diverse sparse problems are quickly changing and growing that demands new sets of features in hardware. Besides, designing domain-specific architectures is costly, slow, and it cannot keep up with the fast pace of problem evolvement. Therefore, we must answer a few key questions: for every single sparse problem that cannot run efficiently on general-purpose processors, do we have to keep designing new specialized hardware? can we have a single platform that can be partially/fully reconfigured to run a program? can AI assist us in determining the ideal configuration for a particular sparse problem? To answer these questions, this talk first proposes domain-specific architectures for four main categories of sparse problems including recommendation systems, scientific computing, graph analytics, and the inference of neural networks. Then, by observing the applicability of some of the proposed solutions to multiple domains of sparse problems, we explore the challenges and opportunities that sparsity would cause/offer when automating the hardware design for sparse problems.