Patrick Chiang received the B.S. degree in electrical engineering and computer sciences from the University of California, Berkeley, in 1997, and the M.S. and Ph.D. degrees in electrical engineering from Stanford University in 2001 and 2007.
In 1998, he was with Datapath Systems (now LSI Logic), working on analog front-ends for DSL chipsets. In 2002 he was a research intern at Velio Communications (now Rambus) working on 10GHz clock synthesis architectures. In 2004 he was a consultant at startup Telegent Systems, evaluating low phase noise VCOs for CMOS mobile TV tuners. In 2006 he was a visiting NSF postdoctoral researcher at Tsinghua University, China, investigating low power, low voltage RF transceivers. In 2009 he was a visiting senior researcher at the ASIC State & Key Laboratory in Fudan University, Shanghai, China.
His interests are: 1) The design of energy-efficient, CMOS interconnects (on-chip/off-chip/wireless) — energy-efficient interfaces will soon be a dominant portion of the power budget on future microprocessors and SoCs. These include on-chip links, off-chip multi-gigahertz I/O, and wireless data transmission. We are investigating new techniques in advanced CMOS processes to enable improved energy-efficiency (pJ/bit-transferred).
2) Wireless, wearable medical sensors — advances in semiconductor technology will soon enable “bandaid-size” medical sensors, non-invasively attached to the human body, allowing for non-invasive monitoring of human activity. These sensors will capture measurement of minute electrical signals (i.e. brain-EEG signals, heart-ECG waves, accelerometer-based activity monitoring), which will provide continuous monitoring of medical condition, such as disease onset, vitamin/drug efficacy, sleep diagnosis, and brain cognition.