OREGON STATE UNIVERSITY

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Found 186 results
Filters: Author is Moon, U.  [Clear All Filters]
2013
Gande, M., J. Guerber, and U. Moon, "Analysis of back-end flash in a 1.5b/stage pipelined ADC", IEEE International Symposium on Circuits and Systems (ISCAS2013), Beijing, China, IEEE, pp. 2247 - 2250, 05/2013.
Venkatram, H., J. Guerber, M. Gande, and U. Moon, "Detection and Correction Methods for Single Event Effects in Analog to Digital Converters", IEEE Transactions on Circuits and Systems I: Regular Papers, pp. 1 - 10, 12/2013.
Rajaee, O., and U. Moon, "Highly Linear Noise-Shaped Pipelined ADC Utilizing a Relaxed Accuracy Front-End", IEEE Journal of Solid-State Circuits, vol. 48, issue 2, pp. 502 - 515, 02/2013.
Oh, T., N. Maghari, and U. Moon, "A Second-Order ΔΣ ADC Using Noise-Shaped Two-Step Integrating Quantizer", IEEE Journal of Solid-State Circuits, vol. 48, issue 6, pp. 1465 - 1474, 06/2013.
Moon, U., M. Gande, H. Venkatram, and J. Guerber, "Ternary R2R DAC design for improved energy efficiency", Electronics Letters, vol. 49, issue 5, pp. 329 - 330, 02/2013.
2012
Guerber, J., H. Venkatram, M. Gande, A. Waters, and U. Moon, "A 10-b Ternary SAR ADC With Quantization Time Information Utilization", IEEE Journal of Solid-State Circuits, vol. 47, issue 11, pp. 2604 - 2613, 11/2012.
Lee, H-Y., B. Lee, and U. Moon, "A 31.3fJ/conversion-step 70.4dB SNDR 30MS/s 1.2V two-step pipelined ADC in 0.13μm CMOS", 2012 IEEE International Solid- State Circuits Conference - (ISSCC), San Francisco, CA, IEEE, pp. 474 - 476, 02/2012.
Oh, T., N. Maghari, and U. Moon, "A 5MHz BW 70.7dB SNDR noise-shaped two-step quantizer based ΔΣ ADC", 2012 Symposium on VLSI Circuits (VLSIC), Honolulu, HI, IEEE, pp. 162 - 163, 06/2012.
Hershberg, B., S. Weaver, K. Sobue, S. Takeuchi, K. Hamashita, and U. Moon, "A 61.5dB SNDR pipelined ADC using simple highly-scalable ring amplifiers", 2012 Symposium on VLSI Circuits (VLSIC), Honolulu, HI, IEEE, pp. 32 - 33, 06/2012.
Gande, M., N. Maghari, T. Oh, and U. Moon, "A 71dB dynamic range third-order ΔΣ TDC using charge-pump", 2012 Symposium on VLSI Circuits (VLSIC), Honolulu, HI, IEEE, pp. 168 - 169, 06/2012.
Guerber, J., M. Gande, and U. Moon, "The Analysis and Application of Redundant Multistage ADC Resolution Improvements Through PDF Residue Shaping", IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 59, issue 8, pp. 1733 - 1742, 08/2012.
Venkatram, H., T. Oh, J. Guerber, and U. Moon, "Class A+ amplifier with controlled positive feedback for discrete-time signal processing circuits", IEEE International Symposium on Circuits and Systems - ISCAS 2012, Seoul, Korea (South), IEEE, pp. 428 - 431, 05/2012.
Oh, T., H. Venkatram, J. Guerber, and U. Moon, "Correlated jitter sampling for jitter cancellation in pipelined TDC", IEEE International Symposium on Circuits and Systems - ISCAS 2012, Seoul, Korea (South), IEEE, pp. 810 - 813, 05/2012.
Hershberg, B. P., T. Musah, S. T. Weaver, and U. Moon, "The effect of correlated level shifting on noise performance in switched capacitor circuits", IEEE International Symposium on Circuits and Systems - ISCAS 2012, Seoul, Korea (South), IEEE, pp. 942 - 945, 05/2012.
Guerber, J., H. Venkatram, T. Oh, and U. Moon, "Enhanced SAR ADC energy efficiency from the early reset merged capacitor switching algorithm", IEEE International Symposium on Circuits and Systems - ISCAS 2012, Seoul, Korea (South), IEEE, pp. 2361 - 2364, 05/2012.
Weaver, S., B. Hershberg, P K. Hanumolu, and U. Moon, "A multiplexer-based digital passive linear counter (PLINCO)", Analog Integrated Circuits and Signal Processing, vol. 73, issue 1, pp. 143 - 149, 10/2012.
Sasidhar, N., D. Gubbins, P K. Hanumolu, and U. Moon, "Rail-to-Rail Input Pipelined ADC Incorporating Multistage Signal Mapping", IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 59, issue 9, pp. 558 - 562, 09/2012.
Hershberg, B., S. Weaver, K. Sobue, S. Takeuchi, K. Hamashita, and U. Moon, "Ring Amplifiers for Switched Capacitor Circuits", IEEE Journal of Solid-State Circuits, vol. 47, issue 12, pp. 2928 - 2942, 12/2012.
Hershberg, B. P., S. T. Weaver, K. Sobue, S. Takeuchi, K. Hamashita, and U. Moon, "Ring amplifiers for switched-capacitor circuits", 2012 IEEE International Solid- State Circuits Conference - (ISSCC), San Francisco, CA, IEEE, pp. 460 - 462, 02/2012.
Hanumolu, P K., U. Moon, and T. S. Fiez, "Tutorial T5: Advanced Analog-Mixed Signal System and Circuit Techniques", 25th International Conference on VLSI Design, Hyderabad, India, IEEE, pp. 20 - 21, 01/2012.
2011
Lee, H-Y., D. Gubbins, B. Lee, and U. Moon, "A 0.7V 810µW 10b 30MS/s comparator-based two-step pipelined ADC", IEEE Custom Integrated Circuits Conference - CICC, San Jose, CA, IEEE, pp. 1 - 4, 09/2011.
Guerber, J., M. Gande, H. Venkatram, A. Waters, and U. Moon, "A 10b Ternary SAR ADC with decision time quantization based redundancy", 2011 IEEE Asian Solid-State Circuits Conference (A-SSCC), Jeju, South Korea, IEEE, pp. 65 - 68, 11/2011.
Rajaee, O., and U. Moon, "A 12-ENOB 6X-OSR noise-shaped pipelined ADC utilizing a 9-bit linear front-end", 2011 Symposium on VLSI Circuits (VLSIC), pp. 34 -35, 06/2011.
Gregoire, R. B., T. Musah, N. Maghari, S. T. Weaver, and U. Moon, "A 30% beyond Vdd signal swing 9-ENOB pipelined ADC using a 1.2V 30dB loop-gain opamp", 2011 IEEE Asian Solid-State Circuits Conference (A-SSCC), Jeju, South Korea, IEEE, pp. 345 - 348, 11/2011.
Oh, T., N. Maghari, D. Gubbins, and U. Moon, "Analysis of Residue Integration Sampling With Improved Jitter Immunity", IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 58, issue 7, pp. 417 - 421, 07/2011.

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