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Enhanced multi-bit delta-sigma modulator with two-step pipeline quantizer

TitleEnhanced multi-bit delta-sigma modulator with two-step pipeline quantizer
Publication TypeConference Paper
Year of Publication2008
AuthorsRajaee, O., and U. Moon
Conference Name2008 IEEE International Symposium on Circuits and Systems - ISCAS 2008
Pagination1212 - 1215
Date Published05/2008
PublisherIEEE
Conference LocationSeattle, WA
ISBN Number978-1-4244-1683-7
Abstract

A new delta-sigma analog-to-digital converter (ADC) is presented in this paper. A two-step pipeline ADC is used as the quantizer of this delta-sigma modulator to reduce the quantization noise at the output of the modulator. The proposed structure relaxes the output swing and gain requirements of the integrators. In addition, the front-end DAC of the proposed modulator is simplified. Simulation results verify the effectiveness of the proposed architecture.

DOI10.1109/ISCAS.2008.4541642