In this paper some new and/or modified topologies for multi-bit DS A/D modulators will be shown. The main results are proven by means of extensive high-level simulations, modeling non-idealities in devices.
First, novel results are presented showing that requantization is feasible. The proposed system is stable for a 1-bit DAC only if the truncation error (T) is shaped with a first order loop. Comparing results with other structures, this one is especially well suited to be implemented with low-resolution analog components. For low oversampling ratios (OSR) the structure presents better performance than the Leslie-Singh’s  structure, because the difference between the analog and the digital transfer functions that the truncation error follows to the output is also shaped by a first order digital DS modulator.
Next, a structure that allows low distortion is presented. The architecture could be considered as an extension of the Chain Of Integrators with Distributed Feedback  topology, mixed with the low distortion topology of the Silva’s structure .
The use of spatial redundancy is also studied, which can improve the robustness under noisy conditions. Some related results are provided.
Also it is shown that the use of a non uniform quantizer which follows a linear step increase can improve the Dynamic Range (DR) with a little penalty in the Signal to Noise Ratio (SNR) of the system.
Finally the idea of Pseudo-Tangential Noise Transfer Function (PT-NTF) modulators is given. Useful for multi-bit modulators, this technique can provide a moderate increase in the overall SNR with only a little modification in the coefficients of the low pass filter (integrators) of the modulator.