Karti Mayaram
Publications
"Design-Oriented Analysis of Circuits With Equality Constraints",
IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 58, issue 5, pp. 1089 - 1098, 05/2011.
Abstract
"A 475 mV, 4.9 GHz enhanced swing differential Colpitts VCO in 130 nm CMOS with an FoM of 196.2 dBc/Hz",
2010 IEEE Custom Integrated Circuits Conference -CICC 2010IEEE Custom Integrated Circuits Conference 2010, San Jose, CA, IEEE, pp. 1 - 4, 09/2010.
Abstract
"An Ultralow-Power Receiver for Wireless Sensor Networks",
IEEE Journal of Solid-State Circuits, vol. 45, issue 9, pp. 1759 - 1769, 09/2010.
Abstract
"A 2.4GHz wireless transceiver with 0.95nJ/b link energy for multi-hop battery-freewireless sensor networks",
2010 IEEE Symposium on VLSI Circuits2010 Symposium on VLSI Circuits, Honolulu, HI, IEEE, pp. 29 - 30, 06/2010.
Abstract
"A 250 mV, 352 µW low-IF quadrature GPS receiver in 130 nm CMOS",
2010 IEEE Symposium on VLSI Circuits, Honolulu, HI, IEEE, pp. 135 - 136, 06/2010.
Abstract
"A Digital PLL With a Stochastic Time-to-Digital Converter",
IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 56, issue 8, pp. 1612 - 1621, 08/2009.
Abstract
"Automated Design and Optimization of Low-Noise Oscillators",
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 28, issue 5, pp. 609 - 622, 05/2009.
Abstract
"Comparison of supply noise and substrate noise reduction in SiGe BiCMOS and FDSOI processes",
2009 10th International Symposium on Quality of Electronic Design (ISQED), San Jose, CA, IEEE, pp. 112 - 115, 03/2009.
Abstract
"Method for a Constant Loop Bandwidth in LC-VCO PLL Frequency Synthesizers",
IEEE Journal of Solid-State Circuits, vol. 44, issue 2, pp. 427 - 435, 02/2009.
Abstract
"A 0.4 nJ/b 900MHz CMOS BFSK super-regenerative receiver",
2008 IEEE Custom Integrated Circuits Conference - CICC 2008, San Jose, CA, IEEE, pp. 591 - 594, 09/2008.
Abstract
"A 900-MHz low-power transmitter with fast frequency calibration for wireless sensor networks",
2008 IEEE Custom Integrated Circuits Conference - CICC 20082008 IEEE Custom Integrated Circuits Conference, San Jose, CA, IEEE, pp. 595 - 598, 09/2008.
Abstract
"Extraction of Parasitics in Inhomogeneous Substrates With a New Green Function-Based Method",
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 27, issue 9, pp. 1595 - 1606, 09/2008.
Abstract
"Noise tolerant oscillator design using perturbation projection vector analysis",
2008 IEEE Custom Integrated Circuits Conference - CICC 2008, San Jose, CA, IEEE, pp. 695 - 698, 09/2008.
Abstract
"Sensitivity Analysis for Oscillators",
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 27, issue 9, pp. 1521 - 1534, 09/2008.
Abstract
"Parameter variation analysis for voltage controlled oscillators in phase-locked loops",
2008 IEEE International Symposium on Circuits and Systems - ISCAS 2008, Seattle, WA, IEEE, pp. 716 - 719, 05/2008.
Abstract
"Periodic Steady-State Analysis Augmented with Design Equality Constraints",
2008 Design, Automation and Test in Europe, Munich, Germany, IEEE, pp. 312 - 317, 03/2008.
Abstract
"Design and Analysis of Noise Tolerant Ring Oscillators Using Maneatis Delay Cells",
2007 14th IEEE International Conference on Electronics, Circuits and Systems (ICECS '07), Marrakech, IEEE, pp. 494 - 497, 12/2007.
Abstract
"Sensitivity analysis for oscillators",
2007 IEEE/ACM International Conference on Computer-Aided Design, San Jose, CA, IEEE, pp. 458 - 463, 11/2007.
Abstract
"A 0.6GHz to 2GHz Digital PLL with Wide Tracking Range",
2007 IEEE Custom Integrated Circuits Conference, San Jose, CA, IEEE, pp. 305 - 308, 09/2007.
Abstract
"A 4.2 GHz PLL Frequency Synthesizer with an Adaptively Tuned Coarse Loop",
2007 IEEE Custom Integrated Circuits Conference, San Jose, CA, IEEE, pp. 547 - 550, 09/2007.
Abstract
"Automated Extraction of Model Parameters for Noise Coupling Analysis in Silicon Substrates",
2007 IEEE Custom Integrated Circuits Conference, San Jose, CA, IEEE, pp. 853 - 856, 09/2007.
Abstract
"Digitally-Enhanced Phase-Locking Circuits",
2007 IEEE Custom Integrated Circuits Conference, San Jose, CA, IEEE, pp. 361 - 368, 09/2007.
Abstract
"Simulation and Modeling of Substrate Noise Generation from Synchronous and Asynchronous Digital Logic Circuits",
2007 IEEE Custom Integrated Circuits Conference, San Jose, CA, IEEE, pp. 845 - 848, 09/2007.
Abstract
"Parameter Finding Methods for Oscillators with a Specified Oscillation Frequency",
Design Automation Conference, DAC '07, San Diego, CA , pp. 424 -429, 06/2007.
Abstract
"Design of Very Low Noise 4.2GHz Clapp VCOs",
2007 IEEE International Symposium on Circuits and Systems, New Orleans, LA, IEEE, pp. 2862 - 2865, 05/2007.
Abstract


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